112G – WikiChip Fuse

Intel Introduces 10nm Agilex FPGAs; Customized Connectivity with HBM, DDR5, PCIe Gen 5, and 112G Transceivers

April 2, 2019May 25, 2021 David Schor 10nm, 112G, Agilex, DDR5, Falcon Mesa, FPGA, Intel, PCIe 4.0, PCIe 5.0, Stratix 10

Intel has introduced their next-generation flagship data center FPGAs based on their 10-nanometer process. Utilizing a chiplet-based architecture, the company hopes to better customize the product for customer’s demand while iterating faster on PHYs and other connectivity protocols.