TSMC Ramps 5nm, Discloses 3nm to Pack Over a Quarter-Billion Transistors Per Square Millimeter

TSMC reports a flat Q1 amid the COVID-19 pandemic, ramps its 5nm node with good yield and discloses key 3-nanometer (N3) details. N3 will be a full node jump over N5 and is expected to offer over a quarter-billion transistors per each millimeter square of silicon.

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GlobalFoundries 14HP process, a marriage of two technologies

As IBM starts shipping their latest server microprocessors we take a look at the process technology that’s enabling those capabilities. Though largely thought to be the same as the original process IBM detailed back in 2014, following their fab selloff the process has undergone some unique changes making it a distinctly GlobalFoundries process now.

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