12LP – WikiChip Fuse

GlobalFoundries, Arm Demonstrate High-Density 3D Stacked Mesh Interconnect for HPC Applications

David SchorArchitectures, Interconnects, Packaging, Process TechnologiesSeptember 21, 2019 Tagged 12LP, 12nm, 3D packaging, ARM, design-for-test, GlobalFoundries, hybrid bonding

GlobalFoundries and Arm demonstrate a 3D mesh interconnect design using highly-dense hybrid bonding 3D stacking technology intended for HPC applications.

AMD Announces Threadripper 2, Chiplets Aid Core Scaling

David SchorDesktop ProcessorsAugust 7, 2018 Tagged 12LP, 12nm, AMD, HEDT, Ryzen, Threadripper, Threadripper 2, x86, Zen

AMD announces their second-generation Threadripper processors with up to 32 cores based on their 12nm Zen+ microarchitecture.

VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP

David SchorFoundries, Process Technologies, VLSI 2018July 22, 2018 Tagged 12LP, 12nm, 14LPP, 14nm, FinFET, GlobalFoundries, process technology

A look at GlobalFoundries 12nm Leading Performance technology, 12LP, an enhanced 14nm process. The process was recently presented at the 2018 Symposia on VLSI Technology and Circuits.

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