12LP – WikiChip Fuse

GlobalFoundries, Arm Demonstrate High-Density 3D Stacked Mesh Interconnect for HPC Applications

September 21, 2019 David Schor 2 Comments 12LP, 12nm, 3D packaging, ARM, design-for-test, GlobalFoundries, hybrid bonding

GlobalFoundries and Arm demonstrate a 3D mesh interconnect design using highly-dense hybrid bonding 3D stacking technology intended for HPC applications.

Desktop Processors

AMD Announces Threadripper 2, Chiplets Aid Core Scaling

August 7, 2018 David Schor 0 Comments 12LP, 12nm, AMD, HEDT, Ryzen Threadripper, x86, Zen

AMD announces their second-generation Threadripper processors with up to 32 cores based on their 12nm Zen+ microarchitecture.

Foundries Process Technologies VLSI 2018

VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP

July 22, 2018 David Schor 0 Comments 12 nm, 12LP, 14 nm, 14LPP, FinFET, GlobalFoundries, process technology

A look at GlobalFoundries 12nm Leading Performance technology, 12LP, an enhanced 14nm process. The process was recently presented at the 2018 Symposia on VLSI Technology and Circuits.