WikiChip Fuse
GlobalFoundries, Arm Demonstrate High-Density 3D Stacked Mesh Interconnect for HPC Applications

GlobalFoundries and Arm demonstrate a 3D mesh interconnect design using highly-dense hybrid bonding 3D stacking technology intended for HPC applications.

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DARPA ERI: How Ayar Labs Collaboration With GF Produces A Photonics Chiplet That Can Supercharge Intel FPGAs

From a DARPA vision and a $15 million seed to a commercialized CMOS silicon photonics product: how Ayar Labs collaboration with GF produces a photonics chiplet that can supercharge Intel FPGAs.

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VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP

A look at GlobalFoundries 12nm Leading Performance technology, 12LP, an enhanced 14nm process. The process was recently presented at the 2018 Symposia on VLSI Technology and Circuits.

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VLSI 2018: Next Week’s Samsung and GlobalFoundries Papers

A preview of some of the process technology papers from next week’s VLSI Symposium.

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GlobalFoundries 14HP process, a marriage of two technologies

As IBM starts shipping their latest server microprocessors we take a look at the process technology that’s enabling those capabilities. Though largely thought to be the same as the original process IBM detailed back in 2014, following their fab selloff the process has undergone some unique changes making it a distinctly GlobalFoundries process now.

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AMD Tech Day: the momentum continues with new products, new prices, and 12nm and 7nm announcements

As they continue on building momentum, AMD held an impressive Tech Day at CES 2018 unveiling a series of products and detailing their aggressive roadmap going forward.

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IEDM 2017: GlobalFoundries 7nm process; Cobalt, EUV

At the 2017 IEDM GlobalFoundries detailed their 7nm Leading Performance (7LP) process, an aggressively scaled version of their 14nm process optimized for next-generation mobile, SoC, and high-performance applications.

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