Process Technologies

IEDM 2018: Intel’s 10nm Standard Cell Library and Power Delivery

David SchorCircuit Design, Floorplanning, IEDM 2018, Process TechnologiesJanuary 6, 2019 Tagged 10nm, DTCO, floorplan, IEDM, IEDM 2018, place and route, power delivery, routing, standard cell

Presented at the 64th IEEE International Electron Devices Meeting (IEDM) in December, here’s a look at Intel’s 10-nanometer standard cell library and power delivery system.

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Intel Looks to Advanced 3D Packaging For More-than-Moore to Supplement 10- and 7-Nanometer Nodes

David SchorInterconnects, Packaging, Process TechnologiesDecember 22, 2018 Tagged 10nm, 2.5D packaging, 3D packaging, 5nm, 7nm, EMIB, Foveros, heterogeneous integration, interconnects, interposer, Lakefield, multi-chip package, Packaging, x86

At the recent Intel Architecture Day, the company unveiled their latest advanced packaging technology called Foveros, a face-to-face three-dimensional (3D) die stacking packaging technology in an effort to assist with the slowing of Moore’s Law.

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IBM Chooses Samsung 7nm EUV for Next-Gen POWER and Z Microprocessors

David SchorFoundries, Process Technologies, Roadmaps, Server ProcessorsDecember 20, 2018 Tagged 7LPP, 7nm, Common Platform Alliance, EUV, IBM, POWER, POWER10, Samsung, Z

IBM partners up with Samsung 7nm EUV process for their next-generation of POWER and Z microprocessors.

Samsung 7nm Enters Risk Production, Talks Roadmap, Scaling Boosters, and the ARM Ecosystem

David SchorARM TechCon 2018, Foundries, Packaging, Process TechnologiesOctober 28, 2018 Tagged 2.5D packaging, 3D packaging, 3GAAE, 3GAAP, 3GAE, 3nm, 4LPE, 4LPP, 5LPE, 5nm, 7LPP, 7nm, EUV, Packaging, Samsung

Samsung gives an update on their 7nm EUV-based process, details the foundry technology roadmap down to 3nm and the ARM ecosystem that follows.

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Nantero’s NRAM, A Universal Memory Candidate?

David SchorHot Chips 30, Interconnects, Process TechnologiesSeptember 22, 2018 Tagged 28nm, carbon nanotube, carbon nanotubes, CNTs, Nantero, non-volatile memory, NRAM, process technology, storage-class memory

Presented at Hot Chips 30, a look at Nantero’s NRAM, a high-performance carbon nanotube-based memory billed as a DRAM successor.

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VLSI 2018: Samsung’s 2nd Gen 7nm, EUV Goes HVM

David SchorProcess Technologies, VLSI 2018August 4, 2018 Tagged 7LPP, 7nm, EUV, process technology, Samsung, VLSI 2018, VLSI Symposium

A look at Samsung’s 2nd generation 7nm process that was recently disclosed at the 38th Symposium on VLSI Technology.

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VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP

David SchorFoundries, Process Technologies, VLSI 2018July 22, 2018 Tagged 12LP, 12nm, 14LPP, 14nm, FinFET, GlobalFoundries, process technology

A look at GlobalFoundries 12nm Leading Performance technology, 12LP, an enhanced 14nm process. The process was recently presented at the 2018 Symposia on VLSI Technology and Circuits.

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VLSI 2018: Samsung’s 8nm 8LPP, a 10nm extension

David SchorProcess Technologies, VLSI 2018July 1, 2018 Tagged 10LPE, 10LPP, 10nm, 8LPP, 8nm, FinFET, Samsung, VLSI 2018, VLSI Symposium

A look at Samsung’s 8nm 8LPP process that was recently disclosed at the 38th Symposium on VLSI Technology.

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VLSI 2018: Samsung’s 11nm nodelet, 11LPP

David SchorProcess Technologies, VLSI 2018June 30, 2018 Tagged 10nm, 11LPP, 11nm, 14nm, FinFET, Samsung, VLSI 2018, VLSI Symposium

A look at Samsung’s 11nm 11LPP process that was recently disclosed at the 38th Symposium on VLSI Technology.

A Look at Intel’s 10nm Std Cell as TechInsights Reports on the i3-8121U, finds Ruthenium

David SchorCircuit Design, Process TechnologiesJune 15, 2018 Tagged 10nm, cobalt, Intel, Intel Custom Foundry, metallization stack, ruthenium, TechInsights

WikiChip takes another look at Intel’s 10-nanometer standard cell design and discusses TechInsights findings of the first 10nm-based chip, the i3-8121U.