UMC Rolls Out 22-Nanometer
FoundriesProcess Technologies December 13, 2019 0
UMC says it has started rolling out its 22-nanometer planar process, offering a new lower-power and cost-sensitive migration path from existing 40nm and 28nm nodes.
Read moreZhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs
Desktop ProcessorsMobile ProcessorsRoadmapsServer Processors December 12, 2019 0
Zhaoxin unveiled plans for two new x86 SoC designs: a high-performance 16-nanometer server chip with up to 32 cores and a separate 7 nm mobile and desktop chip.
Read moreIntel 2020s Process Technology Roadmap: 10nm+++, 3nm, 2nm, and 1.4nm for 2029
IEDM 2019Process TechnologiesRoadmaps December 10, 2019 1
Intel’s process technology roadmap reveals decade-out plans, including a future 10nm+++ node and even a 1.4nm node heading into 2029.
Read moreIntel Starts Shipping Initial Nervana NNP Lineup
Neural ProcessorsSupercomputing 19 December 6, 2019 0
Intel starts shipping its initial Nervana NNP lineup for both inference and training acceleration with four initial models in three different form factors.
Read moreNEC Refreshes SX-Aurora Vector Engine, Outlines Roadmap
RoadmapsServer ProcessorsSupercomputing 19 November 30, 2019 0
NEC refreshes its SX-Aurora Vector Engine accelerator cards, adopts AMD processors, and outlines roadmap.
Read moreJapanese AI Startup Preferred Networks Designed A Custom Half-petaFLOPS Training Chip
ArchitecturesNeural ProcessorsSupercomputersSupercomputing 19 November 24, 2019 0
Japanese AI Startup Preferred Networks has been working on a custom training chip with a peak performance of half-petaFLOPS as well as a supercomputer with a peak performance of 2 exaFLOPS (HP).
Read moreSamsung M5 Core Details Show Up
ArchitecturesMobile Processors November 21, 2019 0
Samsung details the high-level changes to the Exynos M5 core found in the Exynos 990.
Read moreSC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio
ArchitecturesRoadmapsServer ProcessorsSupercomputersSupercomputing 19 November 17, 2019 1
Intel unveils the node architecture of the Aurora Supercomputer; the system will feature Intel’s first Xe GPGPU for HPC, 7nm Ponte Vecchio.
Read moreA Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip
ArchitecturesHot Chips 31InterconnectsNeural ProcessorsPackaging November 16, 2019 0
A look at Cerebras Wafer-Scale Engine (WSE), a chip the size of a wafer, packing over 400K tiny AI cores using 1.2 trillion transistors on a half square foot of silicon.
Read more