David Schor

Ayar Labs Realizes Co-Packaged Silicon Photonics

Architectures Circuit Design Hot Chips 31 Interconnects Packaging January 19, 2020 0

Integrated photonics has long been considered a holy grail for communication. Ayar Labs TeraPHY chiplet represents a major step forward through the co-packaging of the optical interface along with an SoC.

TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY

Foundries January 17, 2020 0

7-nanometer contributes the lion’s share of wafer revenue to TSMC’s fourth-quarter driven by growth from smartphones and HPC. The foundry is also preparing the 5-nanometer node for early this year and the 6-nanometer by the end of the year.

A Look At Celerity’s Second-Gen 496-Core RISC-V Mesh NoC

Architectures Circuit Design Manycore Processors Network-on-Chip Neural Processors VLSI 2019 January 12, 2020 0

A look at the 496-core RISC-V manycore array, network-on-chip, and the digital PLL of the Celerity open-source RISC-V tiered accelerator.

AMD Launches New Entry-Level Mobile ‘Dali’ Processors

CES 2020 Mobile Processors January 9, 2020 0

AMD launches new value and entry-level mobile processors, codenamed Dali.

OCP Bunch of Wires: A New Open Chiplets Interface For Organic Substrates

Hot Interconnects Hot Interconnects 26 Interconnects January 5, 2020 0

A look at a Bunch of Wires, a new open standard chiplets interconnect being proposed by the OCP ODSA group intended for standard organic multi-chip packages as a cheaper alternative to silicon interposers and bridges.

OCP Makes a Push for an Open Chiplet Marketplace

Interconnects Packaging January 4, 2020 0

Jumping ahead of emerging semiconductor trends, the OCP new Open Domain-Specific Architecture subgroup makes a push for an open and standardized chiplet interface and marketplace.

Chuck Peddle: Personal Computer Pioneer, Dies At 82

History December 24, 2019 3

Personal computer pioneer, Chuck Peddle, dies at 82.

A Look At The Habana Inference And Training Neural Processors

Architectures Hot Chips 31 Neural Processors December 15, 2019 2

A look at the Habana inference and training neural processors designed for the acceleration of data center workloads.

TSMC Digs Trenches In Search Of Higher Performance

IEDM 2019 Interconnects Packaging Process Technologies December 14, 2019 0

TSMC leverages existing silicon in the CoWoS process to improve the power delivery system of high-performance applications through new, deep trench capacitors, codename iCAPs.

UMC Rolls Out 22-Nanometer

Foundries Process Technologies December 13, 2019 0

UMC says it has started rolling out its 22-nanometer planar process, offering a new lower-power and cost-sensitive migration path from existing 40nm and 28nm nodes.