David Schor – Page 2 – WikiChip Fuse

GlobalFoundries, Arm Demonstrate High-Density 3D Stacked Mesh Interconnect for HPC Applications

David SchorArchitectures, Interconnects, Packaging, Process TechnologiesSeptember 21, 2019 Tagged 12LP, 12nm, 3D packaging, ARM, design-for-test, GlobalFoundries, hybrid bonding

GlobalFoundries and Arm demonstrate a 3D mesh interconnect design using highly-dense hybrid bonding 3D stacking technology intended for HPC applications.

Intel Stratix 10 DX Adds PCIe Gen 4.0, Cache Coherency: UPI As Stopgap

David SchorFPGAsSeptember 20, 2019 Tagged 14 nm, Agilex, CXL, EMIB, FPGA, Intel, PCIe 4.0, PCIe 5.0, Stratix 10, UPI

Intel launches a new Stratix 10 family bringing new support for PCIe Gen 4.0, new cache-coherency support, and Optane DC DIMM support.

AMD’s New EPYC 7H12: A Specially-Binned HPC Processor

David SchorServer ProcessorsSeptember 20, 2019 Tagged 7 nm, AMD, EPYC, Rome, x86

AMD Introduces the EPYC 7H12, a new 280 W, 64-Core, processor built specifically for HPC customers.

IBM Introduces Next-Gen Z Mainframe: The z15; Wider Cores, More Cores, More Cache, Still 5.2 GHz

David SchorArchitectures, Server ProcessorsSeptember 14, 2019 Tagged 14 nm, 14HP, IBM, z/Architecture, z15

IBM introduces its latest Z mainframe, the z15. Here’s a detailed look at the changes and enhancements that were made including the new system architecture and CPU microarchitecture.

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IBM Open Sources Power ISA, Delays POWER10 to 2021

David SchorArchitectures, OpenPOWER Summit, Roadmaps, Server ProcessorsSeptember 12, 2019 Tagged IBM, OpenPOWER, OpenPOWER Summit, OpenPOWER Summit 2019, POWER, POWER10, POWER9, PowerAXON

At the recent OpenPOWER Summit, IBM outlined their new roadmap, open-sourced the Power ISA, and made a number of additional announcements.

Intel Updates Apollo Lake: More LPC Reliability Issues

David SchorEmbedded ProcessorsSeptember 9, 2019 Tagged 14 nm, Apollo Lake, Goldmont, Intel, x86

Intel updates Apollo Lake CPUs in order to address LPC-related reliability issues.

Intel Launches New Comet Lake 10th Gen Mobile Processors With More Cores, LPDDR4X Memory

David SchorMobile ProcessorsAugust 21, 2019 Tagged 14nm, Comet Lake, Intel, x86

Intel launches new high-performance mobile 10th Generation processors based on the Comet Lake microarchitecture.

A Look At The Ice Lake Thunderbolt 3 Integration

David SchorArchitectures, InterconnectsAugust 11, 2019 Tagged 10nm, Ice Lake, Thunderbolt, Thunderbolt 3, USB 3.1, USB 4, x86

At look the Ice Lake Thunderbolt 3 integration, Intel’s biggest integration since the graphics on Sandy Bridge.

DARPA ERI: HIVE and Intel PUMA Graph Processor

David SchorArchitectures, ERI Summit 2019, Server ProcessorsAugust 4, 2019 Tagged DARPA, DARPA HIVE, Graph Processor, Intel PUMA, Programmable Unified Memory Architecture, PUMA

An update on the DAPRA HIVE program and the first disclosure of Intel’s Graph Analytics (GA) processor that is currently under development

Intel Launches 10th Gen Ice Lake Lineup: 11 New Mobile Chips

David SchorMobile ProcessorsAugust 1, 2019 Tagged 10nm, Gen11, Ice Lake, Sunny Cove, x86

Intel launches 10th Generation Core based on the Ice Lake microarchitecture with a lineup of 11 new mobile chips with a turbo of up to 4.1 GHz