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IBM Doubles Its 14nm eDRAM Density, Adds Hundreds of Megabytes of Cache

Architectures Circuit Design ISSCC 2020 March 8, 2020 5

IBM doubles its 14-nanometer eDRAM density through physical design work, enabling the packing of hundreds of additional megabytes of cache on the latest z15 microprocessor and system controller.

IBM Introduces Next-Gen Z Mainframe: The z15; Wider Cores, More Cores, More Cache, Still 5.2 GHz

Architectures Server Processors September 14, 2019 2

IBM introduces its latest Z mainframe, the z15. Here’s a detailed look at the changes and enhancements that were made including the new system architecture and CPU microarchitecture.

AMD’s Zen CPU Complex, Cache, and SMU

Architectures Circuit Design ISSCC 2018 April 18, 2018 0

A look at AMD’s Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores that are incorporated into a full SoC to form complete products such as their Zeppelin die.