Server Processors

Hot Chips 33 Program: Alder Lake, Sapphire Rapids, Zen 3, Next-Gen Z, Neoverse N2, And Many More

May 13, 2021May 23, 2021 David Schor AMD, ARM, Cerebras, Esperanto, Hot Chips, Hot Chips 33, Intel, Nvidia

The IEEE Symposium on High-Performance Chips Program Committee announced the program for the 2021 Hot Chips 33 conference.

Architectures Server Processors

Arm Launches New Neoverse N2 and V1 Server CPUs: 1.4x-1.5x IPC, SVE, and ARMv9

April 27, 2021May 23, 2021 David Schor ARM, ARMv9, bfloat16, Neoverse N, Neoverse V, Perseus, Scalable Vector Extension (SVE), Scalable Vector Extension 2 (SVE2), Zeus

Arm launches its next-generation server CPUs – Neoverse N2 and Neoverse V1 (formerly Perseus and Zeus). Targeting high-performance servers and the HPC market, the new cores bring 1.4-1.5x higher IPC , SVE support, BFloat16, and the ARMv9 architecture.

Architectures Server Processors

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor 10nm, AVX-512, Ice Lake, Intel, Sunny Cove, x86, Xeon Gold, Xeon Platinum, Xeon Scalable, Xeon Silver

Intel launches its 3rd Generation Xeon Scalable, formerly Ice Lake. Fabricated on the company’s 10nm process, those server chips go up to 40 Sunny Cove cores and offer a 20% IPC improvement over the prior generation.

Roadmaps Server Processors

Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

September 22, 2020May 23, 2021 David Schor ARM, bfloat16, neoverse, Neoverse N, Neoverse V, Perseus, Poseidon, Scalable Vector Extension (SVE), Zeus

Arm updates its Neoverse roadmap with the Neoverse N2 and V1, introducing SVE support for the first time as well as bfloat16 operations. Like the Cortex-X series, the Neoverse V-series will ease its power and area constraints in favor of higher performance.

Hot Chips 32 Server Processors

IBM Releases Power ISA v3.1; To Present POWER10 At Hot Chips 32

May 23, 2020May 23, 2021 David Schor bfloat16, Hot Chips, Hot Chips 32, IBM, OpenPOWER, POWER, Power ISA, POWER10

IBM releases Power ISA v3.1. Among the new instructions, there is new bfloat16 support, new reduced-precision outer-product operations including 4-bit integers, and new instruction prefixes. IBM plans on presenting POWER10 at Hot Chips 32.

Architectures Circuit Design ISSCC 2020 Manycore Processors Server Processors

CEA-Leti Demos a 6-Chiplet 96-Core 3D-Stacked MIPS Processor

March 1, 2020May 25, 2021 David Schor 28nm, 65 nm, active interposer, CEA-Leti, chiplet, interconnects, interposer, ISSCC, ISSCC 2020, multi-chip package, STMicroelectronics

CEA-Leti demonstrates a high-performance microprocessor architecture with a 96-core MIPS processor built with six chiplets 3D-stacked on an active interposer die.

Server Processors

Intel Refreshes 2nd Gen Xeon Scalable, Slashes Prices

February 27, 2020May 25, 2021 David Schor 14 nm, Cascade Lake, Cascade Lake R, Cascade Lake SP, Intel, Xeon Bronze, Xeon Gold, Xeon Platinum, Xeon Scalable, Xeon Silver

Intel refreshes its second-generation Xeon Scalable lineup mid-cycle with new mainstream dual-socket CPUs, improving the performance-per-dollar by as much as 2x over original SKUs.

Architectures Neural Processors Server Processors

Centaur New x86 Server Processor Packs an AI Punch

January 24, 2020May 25, 2021 David Schor 16nm, AI, AVX-512, Centaur Technology, CHA, inference, neural processors, x86

A look at Centaur’s new server-class x86 SoC with an integrated neural processor.

Desktop Processors Mobile Processors Roadmaps Server Processors

Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs

December 12, 2019May 25, 2021 David Schor 16nm, 5 nm, China, DDR5, PCIe 4.0, x86, Zhaoxin

Zhaoxin unveiled plans for two new x86 SoC designs: a high-performance 16-nanometer server chip with up to 32 cores and a separate 7 nm mobile and desktop chip.

Architectures Embedded Processors Neural Processors Server Processors

Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512

December 9, 2019May 25, 2021 David Schor 16nm, AVX-512, Centaur Technology, CHA, inference, neural processors, VIA Technologies, x86

Centaur lifts the veil on CNS, its next-generation x86 core for data center and edge computing. The core improving performance in many areas and adds support for the AVX-512 extension.

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