Circuit Design

DARPA ERI: How Ayar Labs Collaboration With GF Produces A Photonics Chiplet That Can Supercharge Intel FPGAs

Architectures Circuit Design ERI Summit 2019 FPGAs July 20, 2019 0

From a DARPA vision and a $15 million seed to a commercialized CMOS silicon photonics product: how Ayar Labs collaboration with GF produces a photonics chiplet that can supercharge Intel FPGAs.

IEDM 2018: Intel’s 10nm Standard Cell Library and Power Delivery

Circuit Design Floorplanning IEDM 2018 Process Technologies January 6, 2019 3

Presented at the 64th IEEE International Electron Devices Meeting (IEDM) in December, here’s a look at Intel’s 10-nanometer standard cell library and power delivery system.

Hot Chips 30: Intel Kaby Lake G

Circuit Design Hot Chips 30 Packaging September 9, 2018 0

A look at Intel’s current generation of Thin & Light processors with high-performance graphics, formerly known as Kaby Lake G, from Hot Chips 30.

Hot Chips 30: AMD Raven Ridge

Architectures Circuit Design Hot Chips 30 August 26, 2018 0

Overview of AMD Raven Ridge APUs that were recently detailed at Hot Chips 30.

A Look at Intel’s 10nm Std Cell as TechInsights Reports on the i3-8121U, finds Ruthenium

Circuit Design Process Technologies June 15, 2018 5

WikiChip takes another look at Intel’s 10-nanometer standard cell design and discusses TechInsights findings of the first 10nm-based chip, the i3-8121U.

ISSCC 2018: The IBM z14 Microprocessor And System Control Design

Architectures Circuit Design Floorplanning ISSCC 2018 Server Processors May 13, 2018 4

A look at the changes and enhancements that were implemented by IBM in their z14 mainframe microprocessor and system control chips.

A look at Nvidia’s NVLink interconnect and the NVSwitch

Architectures Circuit Design Conferences Floorplanning Graphics Processors May 6, 2018 0

A look at Nvidia’s NVLink interconnect and the 2-billion transistor NVSwitch that is powering Nvidia’s latest DGX-2 deep learning machine.

QUEST, A TCI-Based 3D-Stacked SRAM Neural Processor

Architectures Circuit Design ISSCC 2018 Neural Processors April 25, 2018 0

Attempting to address the memory bandwidth problem, the QUEST neural processor uses 3D-stacked SRAM dies along with ThruChip Interface wireless communication technology to deliver sufficiently high bandwidth to sustain peak processing performance.

AMD’s Zen CPU Complex, Cache, and SMU

Architectures Circuit Design ISSCC 2018 April 18, 2018 0

A look at AMD’s Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores that are incorporated into a full SoC to form complete products such as their Zeppelin die.

ISSCC 2018: AMD’s Zeppelin; Multi-chip routing and packaging

Architectures Circuit Design Floorplanning ISSCC 2018 March 24, 2018 6

A look at AMD’s Zeppelin SoC and the Infinity Fabric, a multi-chip architecture used by AMD to scale their SoC design from the mainstream PC market all the way to the server market.