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Wednesday, July 6, 2022
Latest:
  • Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements
  • Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
  • Arm Unveils Next-Gen Flagship Core: Cortex-X3
  • Arm Introduces The Cortex-A715
  • GlobalWafers To Build A 1.2M WPM Factory In Sherman, Texas
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VLSI

Architectures Circuit Design Manycore Processors Network-on-Chip Neural Processors VLSI 2019 

A Look At Celerity’s Second-Gen 496-Core RISC-V Mesh NoC

January 12, 2020May 25, 2021 David Schor 16nm, AI, Celerity, DARPA, DARPA CRAFT, inference, Network-on-Chip (NoC), neural processors, PLL, RISC-V, VLSI, VLSI 2019

A look at the 496-core RISC-V manycore array, network-on-chip, and the digital PLL of the Celerity open-source RISC-V tiered accelerator.

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Top Six Articles

  • Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements
  • A Look At Intel 4 Process Technology
  • Arm Introduces The Cortex-A715
  • Arm Unveils Next-Gen Flagship Core: Cortex-X3
  • A Look At Samsung’s 4LPE Process
  • TSMC Details 5 nm

Recent

  • Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements

    Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements

    July 5, 2022July 5, 2022 David Schor
  • Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

    Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

    June 28, 2022June 28, 2022 David Schor
  • Arm Unveils Next-Gen Flagship Core: Cortex-X3

    Arm Unveils Next-Gen Flagship Core: Cortex-X3

    June 28, 2022June 28, 2022 David Schor
  • Arm Introduces The Cortex-A715

    Arm Introduces The Cortex-A715

    June 28, 2022June 29, 2022 David Schor
  • GlobalWafers To Build A 1.2M WPM Factory In Sherman, Texas

    GlobalWafers To Build A 1.2M WPM Factory In Sherman, Texas

    June 27, 2022June 27, 2022 David Schor
  • A Look At Samsung’s 4LPE Process

    A Look At Samsung’s 4LPE Process

    June 26, 2022June 26, 2022 David Schor

Random Picks

Hot Chips 30: AMD Raven Ridge

Hot Chips 30: AMD Raven Ridge

August 26, 2018May 25, 2021 David Schor
TSMC Announces 6-Nanometer Process

TSMC Announces 6-Nanometer Process

April 16, 2019May 25, 2021 David Schor
Samsung 7nm Enters Risk Production, Talks Roadmap, Scaling Boosters, and the ARM Ecosystem

Samsung 7nm Enters Risk Production, Talks Roadmap, Scaling Boosters, and the ARM Ecosystem

October 28, 2018May 25, 2021 David Schor
Arm’s New Cortex-M55 Breathes Helium

Arm’s New Cortex-M55 Breathes Helium

June 20, 2020May 23, 2021 David Schor
TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY

TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY

January 17, 2020May 25, 2021 David Schor

Random Tags

2.5D packaging 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen Zen 2

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Intel Silently Launches Cannon Lake

Intel Silently Launches Cannon Lake

May 15, 2018May 25, 2021 David Schor
AMD 3D Stacks SRAM Bumplessly

AMD 3D Stacks SRAM Bumplessly

June 7, 2021June 7, 2021 David Schor
A Look At The AMD Zen 2 Core

A Look At The AMD Zen 2 Core

July 6, 2019May 25, 2021 David Schor
PEZY dominates the new Green500 list

PEZY dominates the new Green500 list

November 13, 2017May 25, 2021 David Schor
TSMC Announces 2x Reticle CoWoS For Next-Gen 5nm HPC Applications

TSMC Announces 2x Reticle CoWoS For Next-Gen 5nm HPC Applications

March 3, 2020May 25, 2021 David Schor
Fujitsu Semi Sells 300mm Mie Fabs

Fujitsu Semi Sells 300mm Mie Fabs

June 29, 2018May 25, 2021 David Schor
Q1 2021 Foundry Update: Spending Bonanza

Q1 2021 Foundry Update: Spending Bonanza

May 18, 2021May 23, 2021 David Schor

ARM WorldView All

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor
Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor

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