Your Chips and Semi News
Arm launches two new IPs for deeply-embedded AI: the Cortex-M55 with the new M-Profile Vector Extension (Helium), and the Ethos-U55, an ultra-low-power dedicated NPU for embedded applications.
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Arm’s Ethos family takes aim at ubiquitous AI with NPUs for ultra-low power IoT to high-performance smartphones and AR/VR.
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A look at Centaur’s new server-class x86 SoC with an integrated neural processor.
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A look at the 496-core RISC-V manycore array, network-on-chip, and the digital PLL of the Celerity open-source RISC-V tiered accelerator.
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A look at the Habana inference and training neural processors designed for the acceleration of data center workloads.
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Centaur lifts the veil on CNS, its next-generation x86 core for data center and edge computing. The core improving performance in many areas and adds support for the AVX-512 extension.
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Intel starts shipping its initial Nervana NNP lineup for both inference and training acceleration with four initial models in three different form factors.
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AI startup Groq makes an initial disclosure of their Tensor Streaming Processor (TSP); a single chip capable of 1 petaOPS or 250 teraFLOPS of compute.
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Intel announces Keem Bay, its 3rd-generation Movidius VPU edge inference processor.
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First detailed at Hot Chips 31, Intel Spring Hill morphs the Ice Lake SoC into a highly power-efficient data center inference accelerator.
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