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Architectures Neural Processors 

Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55

February 10, 2020May 25, 2021 David Schor ARM, Arm Ethos, Cortex, Cortex-M55, inference, neural processors

Arm launches two new IPs for deeply-embedded AI: the Cortex-M55 with the new M-Profile Vector Extension (Helium), and the Ethos-U55, an ultra-low-power dedicated NPU for embedded applications.

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Architectures Linley Processor Conference Neural Processors 

Arm Ethos is for Ubiquitous AI At the Edge

February 6, 2020May 25, 2021 David Schor AI, ARM, Arm Ethos, Arm ML Processor (MLP), inference, neural processors

Arm’s Ethos family takes aim at ubiquitous AI with NPUs for ultra-low power IoT to high-performance smartphones and AR/VR.

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Architectures Neural Processors Server Processors 

Centaur New x86 Server Processor Packs an AI Punch

January 24, 2020May 25, 2021 David Schor 16nm, AI, AVX-512, Centaur Technology, CHA, inference, neural processors, x86

A look at Centaur’s new server-class x86 SoC with an integrated neural processor.

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Architectures Circuit Design Manycore Processors Network-on-Chip Neural Processors VLSI 2019 

A Look At Celerity’s Second-Gen 496-Core RISC-V Mesh NoC

January 12, 2020May 25, 2021 David Schor 16nm, AI, Celerity, DARPA, DARPA CRAFT, inference, Network-on-Chip (NoC), neural processors, PLL, RISC-V, VLSI, VLSI 2019

A look at the 496-core RISC-V manycore array, network-on-chip, and the digital PLL of the Celerity open-source RISC-V tiered accelerator.

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Architectures Hot Chips 31 Neural Processors 

A Look At The Habana Inference And Training Neural Processors

December 15, 2019May 25, 2021 David Schor 16nm, AI, Gaudi, Goya, Habana Labs, Hot Chips, Hot Chips 31, inference, neural processors, OCP Accelerator Module (OAM), training

A look at the Habana inference and training neural processors designed for the acceleration of data center workloads.

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Architectures Embedded Processors Neural Processors Server Processors 

Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512

December 9, 2019May 25, 2021 David Schor 16nm, AVX-512, Centaur Technology, CHA, inference, neural processors, VIA Technologies, x86

Centaur lifts the veil on CNS, its next-generation x86 core for data center and edge computing. The core improving performance in many areas and adds support for the AVX-512 extension.

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Neural Processors Supercomputing 19 

Intel Starts Shipping Initial Nervana NNP Lineup

December 6, 2019May 25, 2021 David Schor AI, inference, Intel, neural processors, NNP, NNP-T, NPP-L, OCP Accelerator Module (OAM), Spring Crest, Spring Hill, Supermicro, training

Intel starts shipping its initial Nervana NNP lineup for both inference and training acceleration with four initial models in three different form factors.

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Architectures 

Groq Tensor Streaming Processor Delivers 1 PetaOPS of Compute

November 15, 2019May 25, 2021 David Schor AI, Groq, inference, neural processors, Software Defined Hardware (SDH), Tensor Streaming Architecture (TSA), Tensor Streaming Processor (TSP)

AI startup Groq makes an initial disclosure of their Tensor Streaming Processor (TSP); a single chip capable of 1 petaOPS or 250 teraFLOPS of compute.

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Neural Processors 

Intel Announces Keem Bay: 3rd Generation Movidius VPU

November 12, 2019May 25, 2021 David Schor AI, inference, Intel, Intel AI Summit, Movidius, neural processors

Intel announces Keem Bay, its 3rd-generation Movidius VPU edge inference processor.

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Architectures Hot Chips 31 Neural Processors 

Intel Spring Hill: Morphing Ice Lake SoC Into A Power-Efficient Data Center Inference Accelerator

October 20, 2019May 25, 2021 David Schor 10nm, AI, inference, Intel, Nervana, neural processors, Spring Hill, Sunny Cove, Tensilica Vision DSP, Tensilica Vision P6, x86

First detailed at Hot Chips 31, Intel Spring Hill morphs the Ice Lake SoC into a highly power-efficient data center inference accelerator.

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  • ← Previous

Top Six Articles

  • TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node
  • Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
  • TSMC 2021 Foundry Update: Foundry Roadmap
  • Intel Announces 20Å Node: RibbonFET Devices, PowerVia, 2024 Ramp
  • AMD 3D Stacks SRAM Bumplessly

Recent

  • Samsung 17nm follows Intel 16

    Samsung 17nm follows Intel 16

    May 22, 2022May 22, 2022 David Schor
  • Reincarnating The 6502 Using Flexible TFT Tech For IoT

    Reincarnating The 6502 Using Flexible TFT Tech For IoT

    May 8, 2022May 8, 2022 David Schor
  • Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC

    Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC

    February 20, 2022February 21, 2022 David Schor
  • Samsung-Esperanto Concept AI-SSD Prototype

    Samsung-Esperanto Concept AI-SSD Prototype

    November 21, 2021November 21, 2021 David Schor
  • EUV State, NXE:3600D, and Pellicle Readiness and Industrialization

    EUV State, NXE:3600D, and Pellicle Readiness and Industrialization

    November 20, 2021November 20, 2021 David Schor
  • Intel Launches 12th Gen Core Desktop Alder Lake Processors

    Intel Launches 12th Gen Core Desktop Alder Lake Processors

    October 27, 2021November 3, 2021 David Schor

Random Picks

AMD Launches Ryzen Pro 4000 Series

AMD Launches Ryzen Pro 4000 Series

May 7, 2020May 23, 2021 David Schor
Arm Unveils the Cortex-A78: When Less Is More

Arm Unveils the Cortex-A78: When Less Is More

May 26, 2020May 23, 2021 David Schor
Intel silently launches Knights Mill

Intel silently launches Knights Mill

December 18, 2017May 25, 2021 David Schor
Intel Rolls Out Next-Gen Data Center Portfolio; 100 Gigabit Ethernet, Optane DC, Hewitt Lake, and Cascade Lake With Up to 56 Cores

Intel Rolls Out Next-Gen Data Center Portfolio; 100 Gigabit Ethernet, Optane DC, Hewitt Lake, and Cascade Lake With Up to 56 Cores

April 2, 2019May 25, 2021 David Schor
8th Gen Coffee Lake and 9th Gen Lineup

8th Gen Coffee Lake and 9th Gen Lineup

November 24, 2017May 25, 2021 David Schor

Random Tags

2.5D packaging 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 12nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 edge computing EMIB EUV FinFET Foveros GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Japanese AI Startup Preferred Networks Designed A Custom Half-petaFLOPS Training Chip

Japanese AI Startup Preferred Networks Designed A Custom Half-petaFLOPS Training Chip

November 24, 2019May 25, 2021 David Schor
Intel Updates Apollo Lake: More LPC Reliability Issues

Intel Updates Apollo Lake: More LPC Reliability Issues

September 9, 2019May 25, 2021 David Schor
Intel Announces a 5 GHz Core i7-8086K, Launches on the 40th Anniversary of the 8086

Intel Announces a 5 GHz Core i7-8086K, Launches on the 40th Anniversary of the 8086

June 5, 2018May 25, 2021 David Schor
Arm Announces a New Security Certification Program for IoT Devices

Arm Announces a New Security Certification Program for IoT Devices

February 25, 2019May 25, 2021 David Schor
YouTube Accelerates Transcoding

YouTube Accelerates Transcoding

August 21, 2021August 21, 2021 David Schor
Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700

Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700

May 25, 2021May 25, 2021 David Schor

ARM WorldView All

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor
A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip
IEDM 2020 Interconnects Packaging Subscriber Only Content 

A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip

June 11, 2021June 11, 2021 David Schor
Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700
Architectures Interconnects Network-on-Chip 

Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700

May 25, 2021May 25, 2021 David Schor
Arm Launches The DSU-110 For New Armv9 CPU Clusters
Architectures Interconnects Mobile Processors 

Arm Launches The DSU-110 For New Armv9 CPU Clusters

May 25, 2021May 25, 2021 David Schor

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