WikiChip Fuse
A Look At Celerity’s Second-Gen 496-Core RISC-V Mesh NoC

A look at the 496-core RISC-V manycore array, network-on-chip, and the digital PLL of the Celerity open-source RISC-V tiered accelerator.

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A Look At The Habana Inference And Training Neural Processors

A look at the Habana inference and training neural processors designed for the acceleration of data center workloads.

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Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512

Centaur lifts the veil on CNS, its next-generation x86 core for data center and edge computing. The core improving performance in many areas and adds support for the AVX-512 extension.

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Intel Starts Shipping Initial Nervana NNP Lineup

Intel starts shipping its initial Nervana NNP lineup for both inference and training acceleration with four initial models in three different form factors.

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Groq Tensor Streaming Processor Delivers 1 PetaOPS of Compute

AI startup Groq makes an initial disclosure of their Tensor Streaming Processor (TSP); a single chip capable of 1 petaOPS or 250 teraFLOPS of compute.

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Intel Announces Keem Bay: 3rd Generation Movidius VPU

Intel announces Keem Bay, its 3rd-generation Movidius VPU edge inference processor.

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Intel Spring Hill: Morphing Ice Lake SoC Into A Power-Efficient Data Center Inference Accelerator

First detailed at Hot Chips 31, Intel Spring Hill morphs the Ice Lake SoC into a highly power-efficient data center inference accelerator.

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Analog AI Startup Mythic To Compute And Scale In Flash

A look at the IPU architecture of analog AI startup Mythic which attempts to significantly reduce the power consumption by computing directly in analog in flash.

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Alibaba Launches DC Inference Accelerators

Alibaba launches its own homegrown inference accelerator for their own cloud.

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Inside Tesla’s Neural Processor In The FSD Chip

A deep dive into the custom-designed Tesla neural processing units integrated inside the company’s full self-driving (FSD) chip based on the Tesla Hot Chips 31 talk.

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