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  • A Look At AMD’s 3D-Stacked V-Cache
  • IEDM 2022: Did We Just Witness The Death Of SRAM?
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores
  • Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications
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Movidius

Neural Processors 

Intel Announces Keem Bay: 3rd Generation Movidius VPU

November 12, 2019May 25, 2021 David Schor AI, inference, Intel, Intel AI Summit, Movidius, neural processors

Intel announces Keem Bay, its 3rd-generation Movidius VPU edge inference processor.

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Top Six Articles

  • A Look At Intel 4 Process Technology
  • TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node
  • Arm Introduces Its Confidential Compute Architecture
  • Arm Introduces The Cortex-A715
  • N3E Replaces N3; Comes In Many Flavors
  • Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

Recent

  • A Look At AMD’s 3D-Stacked V-Cache

    A Look At AMD’s 3D-Stacked V-Cache

    December 27, 2022December 27, 2022 David Schor
  • IEDM 2022: Did We Just Witness The Death Of SRAM?

    IEDM 2022: Did We Just Witness The Death Of SRAM?

    December 14, 2022December 15, 2022 David Schor
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    November 1, 2022November 2, 2022 David Schor
  • Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process

    Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process

    October 7, 2022October 7, 2022 David Schor
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    October 4, 2022October 4, 2022 David Schor
  • Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    October 1, 2022October 3, 2022 David Schor

Random Picks

Intel to leverage EMIBs to create mobile processors with discrete AMD graphics

Intel to leverage EMIBs to create mobile processors with discrete AMD graphics

November 7, 2017May 25, 2021 David Schor
Intel Looks to Advanced 3D Packaging For More-than-Moore to Supplement 10- and 7-Nanometer Nodes

Intel Looks to Advanced 3D Packaging For More-than-Moore to Supplement 10- and 7-Nanometer Nodes

December 22, 2018May 25, 2021 David Schor
OCP Bunch of Wires: A New Open Chiplets Interface For Organic Substrates

OCP Bunch of Wires: A New Open Chiplets Interface For Organic Substrates

January 5, 2020May 25, 2021 David Schor
POWER9 Scales Up To 1.2 TB/s of I/O, Targets NVLink 3, OpenCAPI Memory for 2019

POWER9 Scales Up To 1.2 TB/s of I/O, Targets NVLink 3, OpenCAPI Memory for 2019

October 7, 2018May 25, 2021 David Schor
Qualcomm Launches The Snapdragon 710, A New Premium Mid-Range SoC

Qualcomm Launches The Snapdragon 710, A New Premium Mid-Range SoC

May 25, 2018May 25, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel Intel 7 ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Left, Right, Above, and Under: Intel 3D Packaging Tech Gains Omnidirectionality

Left, Right, Above, and Under: Intel 3D Packaging Tech Gains Omnidirectionality

May 17, 2020May 23, 2021 David Schor
IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects

IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects

February 17, 2018May 25, 2021 David Schor
WikiChip Fuse Moves to a Decaying Paywall Model

WikiChip Fuse Moves to a Decaying Paywall Model

May 13, 2021May 23, 2021 David Schor
Intel Refreshes 2nd Gen Xeon Scalable, Slashes Prices

Intel Refreshes 2nd Gen Xeon Scalable, Slashes Prices

February 27, 2020May 25, 2021 David Schor
ASML Starts NXE:3400C Shipment, But Supply Constraints Loom

ASML Starts NXE:3400C Shipment, But Supply Constraints Loom

October 17, 2019May 25, 2021 David Schor
AMD’s New EPYC 7H12: A Specially-Binned HPC Processor

AMD’s New EPYC 7H12: A Specially-Binned HPC Processor

September 20, 2019May 25, 2021 David Schor
Intel Launches New Core X Enthusiasts Microprocessors; Doubles The Perf-Per-Dollar

Intel Launches New Core X Enthusiasts Microprocessors; Doubles The Perf-Per-Dollar

October 4, 2019May 25, 2021 David Schor

ARM WorldView All

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor
Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor

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