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  • A Look At AMD’s 3D-Stacked V-Cache
  • IEDM 2022: Did We Just Witness The Death Of SRAM?
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores
  • Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications
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Zen

Architectures Floorplanning Interconnects ISSCC 2020 

7nm Boosted Zen 2 Capabilities but Doubled the Challenges

February 21, 2020May 25, 2021 David Schor 14 nm, 7 nm, AMD, capacitance, GlobalFoundries, ISSCC, ISSCC 2020, resistance, TSMC, wire delay, Zen, Zen 2

The transition to 7 nm greatly enhanced AMD silicon capabilities but introduced new drastic design challenges that required new place and route methodologies and wire engineering.

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CES 2020 Mobile Processors 

AMD Launches New Entry-Level Mobile ‘Dali’ Processors

January 9, 2020May 25, 2021 David Schor 14 nm, AMD, Athlon, CES 2020, Consumer Electronics Show (CES), Ryzen Mobile, Zen

AMD launches new value and entry-level mobile processors, codenamed Dali.

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Desktop Processors 

AMD Launches Ryzen PRO 3000 Series

October 3, 2019May 25, 2021 David Schor 12 nm, 7 nm, AMD, Matisse, Picasso, x86, Zen, Zen 2

AMD launches PRO 3000-series 7nm desktop processors and 12nm APUs.

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Architectures 

A Look At The AMD Zen 2 Core

July 6, 2019May 25, 2021 David Schor 7nm, branch prediction, x86, Zen, Zen 2

Ahead of the highly anticipated Ryzen 3000 desktop series launch, here is a look at the AMD Zen 2 core microarchitecture.

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Architectures Server Processors 

AMD Discloses Initial Zen 2 Details

November 18, 2018May 25, 2021 David Schor 14 nm, 7 nm, AMD, Rome, x86, Zen, Zen 2, Zen 4

Following AMD’s recent Zen 2 and Rome disclosure, here’s a look at what has changed and what second-generation EPYC brings to the table.

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Architectures Circuit Design Hot Chips 30 

Hot Chips 30: AMD Raven Ridge

August 26, 2018May 25, 2021 David Schor 14 nm, 14LPP, AMD, AMD's infinity fabric, APU, Hot Chips, Hot Chips 30, Radeon Vega, Raven Ridge, Vega, x86, Zen

Overview of AMD Raven Ridge APUs that were recently detailed at Hot Chips 30.

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Desktop Processors 

AMD Announces Threadripper 2, Chiplets Aid Core Scaling

August 7, 2018May 25, 2021 David Schor 12LP, 12nm, AMD, HEDT, Ryzen Threadripper, x86, Zen

AMD announces their second-generation Threadripper processors with up to 32 cores based on their 12nm Zen+ microarchitecture.

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Architectures Circuit Design ISSCC 2018 

AMD’s Zen CPU Complex, Cache, and SMU

April 18, 2018May 25, 2021 David Schor 14 nm, 14LPP, AMD, cache, floorplan, ISSCC, ISSCC 2017, ISSCC 2018, SRAM, x86, Zen

A look at AMD’s Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores that are incorporated into a full SoC to form complete products such as their Zeppelin die.

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Desktop Processors 

AMD introduces Ryzen 2nd Gen up for pre-order

April 13, 2018May 25, 2021 David Schor 14 nm, AMD, Ryzen, x86, Zen

Ahead of its April 19th release, AMD is now offering pre-orders for their 2nd Generation, Ryzen 2000 family, desktop processors.

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Architectures Circuit Design Floorplanning ISSCC 2018 

ISSCC 2018: AMD’s Zeppelin; Multi-chip routing and packaging

March 24, 2018May 25, 2021 David Schor 14 nm, 2D packaging, AMD, AMD's infinity fabric, EPYC, multi-chip package, Ryzen, x86, Zen

A look at AMD’s Zeppelin SoC and the Infinity Fabric, a multi-chip architecture used by AMD to scale their SoC design from the mainstream PC market all the way to the server market.

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  • ← Previous

Top Six Articles

  • A Look At Intel 4 Process Technology
  • TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node
  • Arm Introduces The Cortex-A715
  • Arm Introduces Its Confidential Compute Architecture
  • Intel Reveals 10nm Sunny Cove Core, a New Core Roadmap, and Teases Ice Lake Chips
  • AMD’s Zen CPU Complex, Cache, and SMU

Recent

  • A Look At AMD’s 3D-Stacked V-Cache

    A Look At AMD’s 3D-Stacked V-Cache

    December 27, 2022December 27, 2022 David Schor
  • IEDM 2022: Did We Just Witness The Death Of SRAM?

    IEDM 2022: Did We Just Witness The Death Of SRAM?

    December 14, 2022December 15, 2022 David Schor
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    November 1, 2022November 2, 2022 David Schor
  • Intel, SiFive Demo High-Performance  RISC-V Horse Creek Dev Platform On Intel 4 Process

    Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process

    October 7, 2022October 7, 2022 David Schor
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    October 4, 2022October 4, 2022 David Schor
  • Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    October 1, 2022October 3, 2022 David Schor

Random Picks

Bitcoin giant Bitmain enters the AI market with the BM1680 neural processor

Bitcoin giant Bitmain enters the AI market with the BM1680 neural processor

November 8, 2017May 25, 2021 David Schor
Intel Talks 10nm DTCO, EUV Benefits

Intel Talks 10nm DTCO, EUV Benefits

June 22, 2021August 2, 2021 David Schor
TSMC Announces 2x Reticle CoWoS For Next-Gen 5nm HPC Applications

TSMC Announces 2x Reticle CoWoS For Next-Gen 5nm HPC Applications

March 3, 2020May 25, 2021 David Schor
A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor

A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor

November 10, 2019May 25, 2021 David Schor
Goldmont Plus detailed, large improvements, setting the stage for a 32-core model

Goldmont Plus detailed, large improvements, setting the stage for a 32-core model

December 26, 2017May 25, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel Intel 7 ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Alibaba Launches DC Inference Accelerators

Alibaba Launches DC Inference Accelerators

September 28, 2019May 25, 2021 David Schor
Intel Cascade Lake Brings Hardware Mitigations, AI Acceleration, SCM Support

Intel Cascade Lake Brings Hardware Mitigations, AI Acceleration, SCM Support

November 11, 2018May 25, 2021 David Schor
POWER9 Scales Up To 1.2 TB/s of I/O, Targets NVLink 3, OpenCAPI Memory for 2019

POWER9 Scales Up To 1.2 TB/s of I/O, Targets NVLink 3, OpenCAPI Memory for 2019

October 7, 2018May 25, 2021 David Schor
N3E Replaces N3; Comes In Many Flavors

N3E Replaces N3; Comes In Many Flavors

September 4, 2022September 4, 2022 David Schor
QUEST, A TCI-Based 3D-Stacked SRAM Neural Processor

QUEST, A TCI-Based 3D-Stacked SRAM Neural Processor

April 25, 2018May 25, 2021 David Schor
Intel to leverage EMIBs to create mobile processors with discrete AMD graphics

Intel to leverage EMIBs to create mobile processors with discrete AMD graphics

November 7, 2017May 25, 2021 David Schor
Core i7-8700K overclockability silicon lottery stats

Core i7-8700K overclockability silicon lottery stats

November 12, 2017May 25, 2021 David Schor

ARM WorldView All

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor
Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor

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