RISC-V

A Look At The ET-SoC-1, Esperanto’s Massively Multi-Core RISC-V Approach To AI

July 10, 2021August 2, 2021 David Schor 7 nm, Esperanto, ET-Maxion, ET-Minion, ET-SoC-1, neural processors, RISC-V, TSMC

A look at Esperanto’s ET-SoC-1, the startup’s first AI inference accelerator for the data center. The company took a unique RISC-V approach with a massively multi-core chip with nearly 1,100 custom-designed CPU cores.

Architectures Circuit Design Manycore Processors Network-on-Chip Neural Processors VLSI 2019

A Look At Celerity’s Second-Gen 496-Core RISC-V Mesh NoC

January 12, 2020May 25, 2021 David Schor 16nm, AI, Celerity, DARPA, DARPA CRAFT, inference, Network-on-Chip (NoC), neural processors, PLL, RISC-V, VLSI, VLSI 2019

A look at the 496-core RISC-V manycore array, network-on-chip, and the digital PLL of the Celerity open-source RISC-V tiered accelerator.

Architectures Neural Processors

Analog AI Startup Mythic To Compute And Scale In Flash

October 6, 2019May 25, 2021 David Schor 40 nm, AI, analog, eFlash, embedded flash, inference, Mythic, neural processors, RISC-V

A look at the IPU architecture of analog AI startup Mythic which attempts to significantly reduce the power consumption by computing directly in analog in flash.

Architectures Circuit Design ERI Summit 2019 FPGAs

DARPA ERI: How Ayar Labs Collaboration With GF Produces A Photonics Chiplet That Can Supercharge Intel FPGAs

July 20, 2019May 25, 2021 David Schor 45 nm, 45RFSOI, Advanced Interface Bus (AIB), Ayar Labs, chiplet, DARPA, EMIB, ERI Summit, ERI Summit 2019, FPGA, GlobalFoundries, Photonics, RISC-V, Stratix 10

From a DARPA vision and a $15 million seed to a commercialized CMOS silicon photonics product: how Ayar Labs collaboration with GF produces a photonics chiplet that can supercharge Intel FPGAs.

Architectures Interconnects Neural Processors VLSI 2019

Nvidia Inference Research Chip Scales to Dozens of Chiplets

June 30, 2019May 25, 2021 David Schor 16nm, chiplet, ground-referenced signaling, inference, multi-chip package, neural processors, Nvidia, RISC-V

Nvidia recently presented a research chip comprising dozens of chiplets that enables them to scale from milliwatts to hundreds of watts in order to cater to different markets such as edge, mobile, automotive, and data center.

Architectures Embedded Processors Mobile Processors

SiFive Launches 7 Series, Their Highest Performance RISC-V Cores

November 8, 2018May 25, 2021 David Schor RISC-V, SiFive

SiFive launches 7 Series, their highest-performance RISC-V cores.

Architectures Circuit Design Embedded Processors ISSCC 2018

ISSCC 2018: MIT’s low-power hardware crypto RISC-V IoT processor

March 17, 2018May 25, 2021 David Schor 65nm, crypto engine, DTLS, edge computing, IoT, ISSCC, ISSCC 2018, MIT, RISC-V

In recent years, IoT devices have been plagued with security issues. Memory and energy constraints of those low-power devices mean there is very little headroom for complex security implementations. At ISSCC 2018, a team of MIT researchers has attempted to address this problem with their low-power fully in-hardware crypto engine IoT RISC-V processor.

Embedded Processors Neural Processors

The RISC-V momentum continues with the GAP8, a new IoT/AI Application Processor

February 28, 2018May 25, 2021 David Schor 55LP, 55nm, AI, Deep Learning, edge computing, GreenWaves, IoT, neural processors, RISC-V, TSMC

The RISC-V momentum continues with the the launch of the GAP8, an IoT/AI ultra-low power application processor by GreenWaves, a France-based startup. The chip is designed for lengthy autonomous battery-powered edge/IoT inference operations.

Manycore Processors Neural Processors

Esperanto exits stealth mode, aims at AI with a 4,096-core 7nm RISC-V monster

January 1, 2018May 25, 2021 David Schor 7nm, AI, Esperanto, HBM, RISC-V, TSMC

Exiting stealth mode, Esperanto, a small start-up lead by Dave Ditzel has unveiled their high-performance RISC-V cores they have been working on. Their first product will be a 4,096-core manycore processor designed for accelerating AI workloads.