Ayar Labs

Ayar Labs Realizes Co-Packaged Silicon Photonics

January 19, 2020May 25, 2021 David Schor 45 nm, 45RFSOI, Ayar Labs, chiplet, GlobalFoundries, GlobalFoundries Technology Conference (GTC), Hot Chips, Hot Chips 31, Intel, multi-chip package, Photonics, silicon photonics, Stratix 10, TeraPHY

Integrated photonics has long been considered a holy grail for communication. Ayar Labs TeraPHY chiplet represents a major step forward through the co-packaging of the optical interface along with an SoC.

Architectures Circuit Design ERI Summit 2019 FPGAs

DARPA ERI: How Ayar Labs Collaboration With GF Produces A Photonics Chiplet That Can Supercharge Intel FPGAs

July 20, 2019May 25, 2021 David Schor 45 nm, 45RFSOI, Advanced Interface Bus (AIB), Ayar Labs, chiplet, DARPA, EMIB, ERI Summit, ERI Summit 2019, FPGA, GlobalFoundries, Photonics, RISC-V, Stratix 10

From a DARPA vision and a $15 million seed to a commercialized CMOS silicon photonics product: how Ayar Labs collaboration with GF produces a photonics chiplet that can supercharge Intel FPGAs.