WikiChip Fuse
IBM Doubles Its 14nm eDRAM Density, Adds Hundreds of Megabytes of Cache

IBM doubles its 14-nanometer eDRAM density through physical design work, enabling the packing of hundreds of additional megabytes of cache on the latest z15 microprocessor and system controller.

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CEA-Leti Demos a 6-Chiplet 96-Core 3D-Stacked MIPS Processor

CEA-Leti demonstrates a high-performance microprocessor architecture with a 96-core MIPS processor built with six chiplets 3D-stacked on an active interposer die.

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Radeon RX 5700: Navi and the RDNA Architecture

A look at AMD’s Radeon RX 5700 GPU built on a 7-nanometer process based on the new Navi microarchitecture and RDNA graphics architecture.

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7nm Boosted Zen 2 Capabilities but Doubled the Challenges

The transition to 7 nm greatly enhanced AMD silicon capabilities but introduced new drastic design challenges that required new place and route methodologies and wire engineering.

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Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55

Arm launches two new IPs for deeply-embedded AI: the Cortex-M55 with the new M-Profile Vector Extension (Helium), and the Ethos-U55, an ultra-low-power dedicated NPU for embedded applications.

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Inside Rosetta: The Engine Behind Cray’s Slingshot Exascale-Era Interconnect

A dive into the Rosetta ASIC switch, the engine behind Cray’s new Slingshot interconnect powering the upcoming Shasta exascale supercomputers.

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Arm Ethos is for Ubiquitous AI At the Edge

Arm’s Ethos family takes aim at ubiquitous AI with NPUs for ultra-low power IoT to high-performance smartphones and AR/VR.

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Intel Axes Nervana Just Two Months After Launch

Intel axes Nervana in favor of Habana.

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Centaur New x86 Server Processor Packs an AI Punch

A look at Centaur’s new server-class x86 SoC with an integrated neural processor.

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Ayar Labs Realizes Co-Packaged Silicon Photonics

Integrated photonics has long been considered a holy grail for communication. Ayar Labs TeraPHY chiplet represents a major step forward through the co-packaging of the optical interface along with an SoC.

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