Architectures

IBM Doubles Its 14nm eDRAM Density, Adds Hundreds of Megabytes of Cache

Architectures Circuit Design ISSCC 2020 March 8, 2020 5

IBM doubles its 14-nanometer eDRAM density through physical design work, enabling the packing of hundreds of additional megabytes of cache on the latest z15 microprocessor and system controller.

CEA-Leti Demos a 6-Chiplet 96-Core 3D-Stacked MIPS Processor

Architectures Circuit Design ISSCC 2020 Manycore Processors Server Processors March 1, 2020 0

CEA-Leti demonstrates a high-performance microprocessor architecture with a 96-core MIPS processor built with six chiplets 3D-stacked on an active interposer die.

Radeon RX 5700: Navi and the RDNA Architecture

Architectures Circuit Design Graphics Processors ISSCC 2020 February 23, 2020 1

A look at AMD’s Radeon RX 5700 GPU built on a 7-nanometer process based on the new Navi microarchitecture and RDNA graphics architecture.

7nm Boosted Zen 2 Capabilities but Doubled the Challenges

Architectures Floorplanning Interconnects ISSCC 2020 February 21, 2020 2

The transition to 7 nm greatly enhanced AMD silicon capabilities but introduced new drastic design challenges that required new place and route methodologies and wire engineering.

Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55

Architectures Neural Processors February 10, 2020 0

Arm launches two new IPs for deeply-embedded AI: the Cortex-M55 with the new M-Profile Vector Extension (Helium), and the Ethos-U55, an ultra-low-power dedicated NPU for embedded applications.

Inside Rosetta: The Engine Behind Cray’s Slingshot Exascale-Era Interconnect

Architectures Hot Interconnects 26 Interconnects Supercomputers February 9, 2020 0

A dive into the Rosetta ASIC switch, the engine behind Cray’s new Slingshot interconnect powering the upcoming Shasta exascale supercomputers.

Arm Ethos is for Ubiquitous AI At the Edge

Architectures Linley Processor Conference Neural Processors February 6, 2020 0

Arm’s Ethos family takes aim at ubiquitous AI with NPUs for ultra-low power IoT to high-performance smartphones and AR/VR.

Intel Axes Nervana Just Two Months After Launch

Architectures Neural Processors Roadmaps February 3, 2020 4

Intel axes Nervana in favor of Habana.

Centaur New x86 Server Processor Packs an AI Punch

Architectures Neural Processors Server Processors January 24, 2020 3

A look at Centaur’s new server-class x86 SoC with an integrated neural processor.

Ayar Labs Realizes Co-Packaged Silicon Photonics

Architectures Circuit Design Hot Chips 31 Interconnects Packaging January 19, 2020 0

Integrated photonics has long been considered a holy grail for communication. Ayar Labs TeraPHY chiplet represents a major step forward through the co-packaging of the optical interface along with an SoC.