7nm – WikiChip Fuse

TSMC Talks 7nm, 5nm, Yield, And Next-Gen 5G And HPC Packaging

David SchorPackaging, Process Technologies, SEMICON West 2019, VLSI 2019July 28, 2019 Tagged 3D packaging, 3nm, 5nm, 6nm, 7nm, CoWoS, InFO, InFO_AiP, InFO_MS, InFO_oS, N5, N5P, N6, N7, N7P, SemiConWest, SoIC, VLSI 2019, VLSI Symposium

An update on TSMC current and forthcoming logic process nodes as well as their next-generation advanced packaging technologies.

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SEMICON West 2019: ASML EUV Update

David SchorSEMICON West 2019July 21, 2019 Tagged 3nm, 5nm, 7nm, ASML, EUV, High-NA, NXE:3100, NXE:3300B, NXE:3400B

An update on the current state of EUV systems which was given by ASML at SEMICON West 2019 earlier this month.

A Look At The AMD Zen 2 Core

David SchorArchitecturesJuly 6, 2019 Tagged 7nm, branch prediction, x86, Zen, Zen 2

Ahead of the highly anticipated Ryzen 3000 desktop series launch, here is a look at the AMD Zen 2 core microarchitecture.

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TSMC Demonstrates A 7nm Arm-Based Chiplet Design for HPC

David SchorInterconnects, Packaging, Server Processors, VLSI 2019June 22, 2019 Tagged 7nm, ARM, ARMv8, chiplet, Cortex-A72, CoWoS, LIPINCON, VLSI 2019, VLSI Symposium

A look at a high-performance 7nm Arm-based chiplet architecture which was recently presented by TSMC at the 2019 VLSI Symposium.

TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO

David SchorProcess Technologies, VLSI 2019June 16, 2019 Tagged 7HPC, 7nm, FinFET, SDM845, SDM855, Snapdragon 800, Snapdragon 855, TSMC, VLSI 2019, VLSI Symposium

Update and analysis of TSMC 7-nanometer node low-power and high-performance cells, 2nd generation 7nm, and the design technology co-optimization (DTCO) effort that went into the Snapdragon 855 SoC.

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Leaked Intel Server Roadmap Shows Sapphire Rapids With DDR5/PCIe 5.0 For 2021, Granite Rapids For 2022

David SchorRoadmapsMay 21, 2019 Tagged 10nm, 7nm, Cooper Lake, Granite Rapids, Ice Lake, Sapphire Rapids, x86

A leaked roadmap of Intel server processors reveals some new details about their next-generation Sapphire Rapids and Granite Rapids processors.

Ice Lake Brings A New CPU, GPU, IPU, and I/Os, To Follow By Tiger Lake Next Year

David SchorArchitectures, Floorplanning, Mobile ProcessorsMay 12, 2019 Tagged 10nm, 7nm, AVX-512, Gen11, Ice Lake, Sapphire Rapids, Tiger Lake

A look at Ice Lake mobile CPUs which bring a new CPU core, a new Gen11 GPU, and a new 4th Gen IPU as well the new roadmap detailed by Intel at their recent investor meeting which includes Xeon Sapphire Rapids CPUs and 7nm Xe Data Center GPGPUs for 2021.

Intel Process Technology And Packaging Plans: 10nm in June, 7nm in 2021

David SchorFoundries, Interconnects, Packaging, Process TechnologiesMay 11, 2019 Tagged 10nm, 3D packaging, 7nm, EMIB, HPC, Lakefield

An outline of Intel’s process technology and packaging plans including their 10nm and 7nm nodes as discussed at the company’s recent investor meeting.

Huawei Expands Kunpeng Server CPUs, Plans SMT, SVE For Next Gen

David SchorArchitectures, Server ProcessorsMay 3, 2019 Tagged 7HPC, 7nm, ARM, ARMv8.2, Hi1620, Hi1630, HiSilicon, Huawei, Kunpeng, TaiShan

Last week Huawei expanded their Kunpeng CPU family of custom Arm server processors with more models and new servers.

Arm Launches New Neoverse N1 and E1 Server Cores

David SchorArchitectures, Embedded Processors, Manycore Processors, Server ProcessorsFebruary 20, 2019 Tagged 7nm, AI, Ares, ARM, ARMv8, E1, edge computing, hyperscalers, N1, neoverse, Supercomputers

Affirming their commitment to infrastructure, Arm is launching two new server-grade platforms – the Neoverse N1 and E1. The new platforms are designed to offer new Arm-based high-performance compute and high-throughput performance IP options.

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