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Thursday, March 23, 2023
Latest:
  • A Look At AMD’s 3D-Stacked V-Cache
  • IEDM 2022: Did We Just Witness The Death Of SRAM?
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores
  • Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications
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7nm

Foundries 

TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY

January 17, 2020May 25, 2021 David Schor 3nm, 5nm, 7nm, N3, N5, N6, N7, TSMC

7-nanometer contributes the lion’s share of wafer revenue to TSMC’s fourth-quarter driven by growth from smartphones and HPC. The foundry is also preparing the 5-nanometer node for early this year and the 6-nanometer by the end of the year.

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ARM TechCon 2019 Foundries Process Technologies 

TSMC 5-Nanometer Update

November 1, 2019May 25, 2021 David Schor 5nm, 6nm, 7nm, EUV, N5, N6, N7, TSMC

An update on TSMC’s upcoming 5-nanometer process technology.

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Process Technologies 

TSMC N7+ EUV Process Starts Shipping

October 7, 2019May 25, 2021 David Schor 7nm, EUV, N6, N7, TSMC

TSMC announces its N7+ process which entered HVM earlier this year is now shipping products to market.

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Packaging Process Technologies SEMICON West 2019 VLSI 2019 

TSMC Talks 7nm, 5nm, Yield, And Next-Gen 5G And HPC Packaging

July 28, 2019May 25, 2021 David Schor 3D packaging, 3nm, 5nm, 6nm, 7nm, CoWoS, InFO, InFO_AiP, InFO_MS, InFO_oS, N5, N5P, N6, N7, N7P, SemiConWest, SoIC, TSMC, VLSI 2019, VLSI Symposium

An update on TSMC current and forthcoming logic process nodes as well as their next-generation advanced packaging technologies.

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SEMICON West 2019 

SEMICON West 2019: ASML EUV Update

July 21, 2019May 25, 2021 David Schor 3nm, 5nm, 7nm, ASML, EUV, High-NA, NXE:3100, NXE:3300B, NXE:3400B

An update on the current state of EUV systems which was given by ASML at SEMICON West 2019 earlier this month.

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Architectures 

A Look At The AMD Zen 2 Core

July 6, 2019May 25, 2021 David Schor 7nm, branch prediction, x86, Zen, Zen 2

Ahead of the highly anticipated Ryzen 3000 desktop series launch, here is a look at the AMD Zen 2 core microarchitecture.

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Interconnects Packaging Server Processors VLSI 2019 

TSMC Demonstrates A 7nm Arm-Based Chiplet Design for HPC

June 22, 2019May 25, 2021 David Schor 7nm, ARM, ARMv8, chiplet, Cortex-A72, CoWoS, LIPINCON, TSMC, VLSI 2019, VLSI Symposium

A look at a high-performance 7nm Arm-based chiplet architecture which was recently presented by TSMC at the 2019 VLSI Symposium.

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Process Technologies VLSI 2019 

TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO

June 16, 2019May 25, 2021 David Schor 7HPC, 7nm, FinFET, SDM845, SDM855, Snapdragon 800, Snapdragon 855, TSMC, VLSI 2019, VLSI Symposium

Update and analysis of TSMC 7-nanometer node low-power and high-performance cells, 2nd generation 7nm, and the design technology co-optimization (DTCO) effort that went into the Snapdragon 855 SoC.

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Roadmaps 

Leaked Intel Server Roadmap Shows Sapphire Rapids With DDR5/PCIe 5.0 For 2021, Granite Rapids For 2022

May 21, 2019May 25, 2021 David Schor 10nm, 7nm, Cooper Lake, Granite Rapids, Ice Lake, Sapphire Rapids, x86

A leaked roadmap of Intel server processors reveals some new details about their next-generation Sapphire Rapids and Granite Rapids processors.

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Architectures Floorplanning Mobile Processors 

Ice Lake Brings A New CPU, GPU, IPU, and I/Os, To Follow By Tiger Lake Next Year

May 12, 2019May 25, 2021 David Schor 10nm, 7nm, AVX-512, Gen11, Ice Lake, Sapphire Rapids, Tiger Lake

A look at Ice Lake mobile CPUs which bring a new CPU core, a new Gen11 GPU, and a new 4th Gen IPU as well the new roadmap detailed by Intel at their recent investor meeting which includes Xeon Sapphire Rapids CPUs and 7nm Xe Data Center GPGPUs for 2021.

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  • ← Previous

Top Six Articles

  • IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects
  • A Look At Intel 4 Process Technology
  • Intel 2021 Process Technology Update: Intel 7, Intel 4, Intel 3, and Intel 20A
  • IEDM 2018: Intel’s 10nm Standard Cell Library and Power Delivery
  • Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process
  • GlobalFoundries 14HP process, a marriage of two technologies

Recent

  • A Look At AMD’s 3D-Stacked V-Cache

    A Look At AMD’s 3D-Stacked V-Cache

    December 27, 2022December 27, 2022 David Schor
  • IEDM 2022: Did We Just Witness The Death Of SRAM?

    IEDM 2022: Did We Just Witness The Death Of SRAM?

    December 14, 2022December 15, 2022 David Schor
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    November 1, 2022November 2, 2022 David Schor
  • Intel, SiFive Demo High-Performance  RISC-V Horse Creek Dev Platform On Intel 4 Process

    Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process

    October 7, 2022October 7, 2022 David Schor
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    October 4, 2022October 4, 2022 David Schor
  • Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    October 1, 2022October 3, 2022 David Schor

Random Picks

Cambricon Reaches for the Cloud With a Custom AI Accelerator, Talks 7nm IPs

Cambricon Reaches for the Cloud With a Custom AI Accelerator, Talks 7nm IPs

May 26, 2018May 25, 2021 David Schor
Samsung 5 nm and 4 nm Update

Samsung 5 nm and 4 nm Update

October 19, 2019May 25, 2021 David Schor
A Look At The Ice Lake Thunderbolt 3 Integration

A Look At The Ice Lake Thunderbolt 3 Integration

August 11, 2019May 25, 2021 David Schor
Samsung 17nm follows Intel 16

Samsung 17nm follows Intel 16

May 22, 2022May 22, 2022 David Schor
Hot Chips 30: Nvidia Xavier SoC

Hot Chips 30: Nvidia Xavier SoC

September 8, 2018May 25, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel Intel 7 ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

OCP Bunch of Wires: A New Open Chiplets Interface For Organic Substrates

OCP Bunch of Wires: A New Open Chiplets Interface For Organic Substrates

January 5, 2020May 25, 2021 David Schor
Intel to launch Skylake-D in Q1 2018, followed by Xeons with integrated FPGA

Intel to launch Skylake-D in Q1 2018, followed by Xeons with integrated FPGA

November 26, 2017May 25, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor
Intel unleashes 8th Gen Core Coffee Lake lineup

Intel unleashes 8th Gen Core Coffee Lake lineup

April 3, 2018May 25, 2021 David Schor
Inside Rosetta: The Engine Behind Cray’s Slingshot Exascale-Era Interconnect

Inside Rosetta: The Engine Behind Cray’s Slingshot Exascale-Era Interconnect

February 9, 2020May 25, 2021 David Schor

ARM WorldView All

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor
Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor

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