Skip to content
Wednesday, May 18, 2022
Latest:
  • Reincarnating The 6502 Using Flexible TFT Tech For IoT
  • Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC
  • Samsung-Esperanto Concept AI-SSD Prototype
  • EUV State, NXE:3600D, and Pellicle Readiness and Industrialization
  • Intel Launches 12th Gen Core Desktop Alder Lake Processors
WikiChip Fuse

WikiChip Fuse

Your Chips and Semi News

  • Home
  • Account
  • Main Site
  • Architectures
    • x86
    • ARM
    • RISC-V
    • Power ISA
    • MIPS
  • Supercomputers
  • 14 nm
  • 12nm
  • 10nm
  • 7nm
  • 5nm

Zen 2

Mobile Processors 

AMD Launches Ryzen Pro 4000 Series

May 7, 2020May 23, 2021 David Schor 7 nm, AMD, Ryzen, Ryzen Pro, Zen 2

AMD launches its Zen 2-based Ryzen Pro 4000 series for enterprise customers.

Read more
Architectures Floorplanning Interconnects ISSCC 2020 

7nm Boosted Zen 2 Capabilities but Doubled the Challenges

February 21, 2020May 25, 2021 David Schor 14 nm, 7 nm, AMD, capacitance, GlobalFoundries, ISSCC, ISSCC 2020, resistance, TSMC, wire delay, Zen, Zen 2

The transition to 7 nm greatly enhanced AMD silicon capabilities but introduced new drastic design challenges that required new place and route methodologies and wire engineering.

Read more
Desktop Processors Server Processors 

AMD Announces 3rd Gen Ryzen Threadripper

November 8, 2019May 25, 2021 David Schor 7 nm, AMD, Ryzen Threadripper, x86, Zen 2

AMD announces 3rd-generation Ryzen Threadripper microprocessors with up to 32 cores.

Read more
Desktop Processors 

AMD Launches Ryzen PRO 3000 Series

October 3, 2019May 25, 2021 David Schor 12 nm, 7 nm, AMD, Matisse, Picasso, x86, Zen, Zen 2

AMD launches PRO 3000-series 7nm desktop processors and 12nm APUs.

Read more
Architectures 

A Look At The AMD Zen 2 Core

July 6, 2019May 25, 2021 David Schor 7nm, branch prediction, x86, Zen, Zen 2

Ahead of the highly anticipated Ryzen 3000 desktop series launch, here is a look at the AMD Zen 2 core microarchitecture.

Read more
Architectures Server Processors 

AMD Discloses Initial Zen 2 Details

November 18, 2018May 25, 2021 David Schor 14 nm, 7 nm, AMD, Rome, x86, Zen, Zen 2, Zen 4

Following AMD’s recent Zen 2 and Rome disclosure, here’s a look at what has changed and what second-generation EPYC brings to the table.

Read more
CES 2018 Processors 

AMD Tech Day: the momentum continues with new products, new prices, and 12nm and 7nm announcements

January 8, 2018May 25, 2021 David Schor 12nm, 7nm, AM4, AMD, GlobalFoundries, Navi, Radeon, Radeon Vega, Ryzen, Ryzen Mobile, Ryzen Pro, Vega, x86, Zen, Zen 2, Zen 3

As they continue on building momentum, AMD held an impressive Tech Day at CES 2018 unveiling a series of products and detailing their aggressive roadmap going forward.

Read more

Top Six Articles

  • TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node
  • Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
  • TSMC 2021 Foundry Update: Foundry Roadmap
  • Intel Announces 20Å Node: RibbonFET Devices, PowerVia, 2024 Ramp
  • AMD 3D Stacks SRAM Bumplessly

Recent

  • Reincarnating The 6502 Using Flexible TFT Tech For IoT

    Reincarnating The 6502 Using Flexible TFT Tech For IoT

    May 8, 2022May 8, 2022 David Schor
  • Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC

    Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC

    February 20, 2022February 21, 2022 David Schor
  • Samsung-Esperanto Concept AI-SSD Prototype

    Samsung-Esperanto Concept AI-SSD Prototype

    November 21, 2021November 21, 2021 David Schor
  • EUV State, NXE:3600D, and Pellicle Readiness and Industrialization

    EUV State, NXE:3600D, and Pellicle Readiness and Industrialization

    November 20, 2021November 20, 2021 David Schor
  • Intel Launches 12th Gen Core Desktop Alder Lake Processors

    Intel Launches 12th Gen Core Desktop Alder Lake Processors

    October 27, 2021November 3, 2021 David Schor
  • TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node

    TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node

    October 26, 2021October 26, 2021 David Schor

Random Picks

Zhaoxin launches their highest-performance Chinese x86 chips

Zhaoxin launches their highest-performance Chinese x86 chips

January 21, 2018May 25, 2021 David Schor
Intel Introduces 10nm Agilex FPGAs; Customized Connectivity with HBM, DDR5, PCIe Gen 5, and  112G Transceivers

Intel Introduces 10nm Agilex FPGAs; Customized Connectivity with HBM, DDR5, PCIe Gen 5, and 112G Transceivers

April 2, 2019May 25, 2021 David Schor
SEMICON West 2019: ASML EUV Update

SEMICON West 2019: ASML EUV Update

July 21, 2019May 25, 2021 David Schor
IEDM 2017: Sony’s 3-layer stacked CMOS image sensor technology

IEDM 2017: Sony’s 3-layer stacked CMOS image sensor technology

February 3, 2018May 25, 2021 David Schor
IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects

IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects

February 17, 2018May 25, 2021 David Schor

Random Tags

2.5D packaging 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 12nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 edge computing EMIB EUV FinFET Foveros GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Photonics Chiplet Inches Towards Production

Photonics Chiplet Inches Towards Production

August 16, 2021August 22, 2021 David Schor
Marvell Lays Out ARM Server Roadmap

Marvell Lays Out ARM Server Roadmap

November 9, 2019May 25, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Inside Rosetta: The Engine Behind Cray’s Slingshot Exascale-Era Interconnect

Inside Rosetta: The Engine Behind Cray’s Slingshot Exascale-Era Interconnect

February 9, 2020May 25, 2021 David Schor
Intel Stratix 10 DX Adds PCIe Gen 4.0, Cache Coherency: UPI As Stopgap

Intel Stratix 10 DX Adds PCIe Gen 4.0, Cache Coherency: UPI As Stopgap

September 20, 2019May 25, 2021 David Schor
ASML Q4: NXE:3400C Machines Ramp; Strong Growth Due to EUV in 2020

ASML Q4: NXE:3400C Machines Ramp; Strong Growth Due to EUV in 2020

January 22, 2020May 25, 2021 David Schor
Ayar Labs Realizes Co-Packaged Silicon Photonics

Ayar Labs Realizes Co-Packaged Silicon Photonics

January 19, 2020May 25, 2021 David Schor

ARM WorldView All

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor
A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip
IEDM 2020 Interconnects Packaging Subscriber Only Content 

A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip

June 11, 2021June 11, 2021 David Schor
Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700
Architectures Interconnects Network-on-Chip 

Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700

May 25, 2021May 25, 2021 David Schor
Arm Launches The DSU-110 For New Armv9 CPU Clusters
Architectures Interconnects Mobile Processors 

Arm Launches The DSU-110 For New Armv9 CPU Clusters

May 25, 2021May 25, 2021 David Schor

About

WikiChip
WikiChip is an independent publisher based in New York. The WikiChip Fuse section publishes chips and semiconductor related news with our main site offering in-depth semiconductor resources and analysis.

WikiChip Links

  • Main Site
  • WikiChip Fuse
  • Newsletter
  • Main Site
  • WikiChip Fuse

Copyright © 2022 WikiChip LLC. All rights reserved.