Floorplanning

7nm Boosted Zen 2 Capabilities but Doubled the Challenges

Architectures Floorplanning Interconnects ISSCC 2020 February 21, 2020 2

The transition to 7 nm greatly enhanced AMD silicon capabilities but introduced new drastic design challenges that required new place and route methodologies and wire engineering.

Ice Lake Brings A New CPU, GPU, IPU, and I/Os, To Follow By Tiger Lake Next Year

Architectures Floorplanning Mobile Processors May 12, 2019 4

A look at Ice Lake mobile CPUs which bring a new CPU core, a new Gen11 GPU, and a new 4th Gen IPU as well the new roadmap detailed by Intel at their recent investor meeting which includes Xeon Sapphire Rapids CPUs and 7nm Xe Data Center GPGPUs for 2021.

IEDM 2018: Intel’s 10nm Standard Cell Library and Power Delivery

Circuit Design Floorplanning IEDM 2018 Process Technologies January 6, 2019 3

Presented at the 64th IEEE International Electron Devices Meeting (IEDM) in December, here’s a look at Intel’s 10-nanometer standard cell library and power delivery system.

POWER9 Scales Up To 1.2 TB/s of I/O, Targets NVLink 3, OpenCAPI Memory for 2019

Architectures Floorplanning Hot Chips 30 Interconnects Server Processors October 7, 2018 0

A look at the IBM POWER9 scale-up design recently disclosed at Hot Chips 30 and their plans for a 3rd POWER9 derivative for 2019.

Hot Chips 30: Nvidia Xavier SoC

Architectures Floorplanning Hot Chips 30 September 8, 2018 0

An overview of the Xavier SoC which was detailed by Nvidia at Hot Chips 30.

ISSCC 2018: The IBM z14 Microprocessor And System Control Design

Architectures Circuit Design Floorplanning ISSCC 2018 Server Processors May 13, 2018 5

A look at the changes and enhancements that were implemented by IBM in their z14 mainframe microprocessor and system control chips.

A look at Nvidia’s NVLink interconnect and the NVSwitch

Architectures Circuit Design Conferences Floorplanning Graphics Processors May 6, 2018 0

A look at Nvidia’s NVLink interconnect and the 2-billion transistor NVSwitch that is powering Nvidia’s latest DGX-2 deep learning machine.

ISSCC 2018: AMD’s Zeppelin; Multi-chip routing and packaging

Architectures Circuit Design Floorplanning ISSCC 2018 March 24, 2018 6

A look at AMD’s Zeppelin SoC and the Infinity Fabric, a multi-chip architecture used by AMD to scale their SoC design from the mainstream PC market all the way to the server market.

ISSCC 2018: Intel’s Skylake-SP Mesh and Floorplan

Architectures Circuit Design Floorplanning ISSCC 2018 March 9, 2018 0

At ISSCC 2018 Intel gave us some more interesting architectural details of their latest Skylake server microprocessors which brought a new mesh interconnect, a new cache hierarchy, and wider vector operations among a large array of other enhancements.