Floorplanning

ISSCC 2018: AMD’s Zeppelin; Multi-chip routing and packaging

David SchorArchitectures, Circuit Design, Floorplanning, ISSCC 2018March 24, 2018 Tagged 14nm, 2D packaging, AMD, AMD's infinity fabric, EPYC, multi-chip package, Ryzen, x86, Zen

A look at AMD’s Zeppelin SoC and the Infinity Fabric, a multi-chip architecture used by AMD to scale their SoC design from the mainstream PC market all the way to the server market.

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ISSCC 2018: Intel’s Skylake-SP Mesh and Floorplan

David SchorArchitectures, Circuit Design, Floorplanning, ISSCC 2018March 9, 2018 Tagged 14nm, floorplan, Intel, ISSCC, ISSCC 2018, Skylake, Skylake-SP, x86, Xeon Scalable

At ISSCC 2018 Intel gave us some more interesting architectural details of their latest Skylake server microprocessors which brought a new mesh interconnect, a new cache hierarchy, and wider vector operations among a large array of other enhancements.

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