Skip to content

Wednesday, June 25, 2025

Latest:

Arm Launches Next-Gen Big-Core: Cortex-A725
Arm Unveils 2024 Compute Platform: 3nm, Cortex-X925, Cortex-A725, Immortalis-G925
Arm Launches Next-Gen Flagship Cortex-X925
Amazon Debuts 4th Gen Graviton
Arm Launches the Cortex-M52 For IoT; Its Smallest Processor with Helium

WikiChip Fuse

Your Chips and Semi News

Home
Account
Main Site
Architectures
- x86
- ARM
- RISC-V
- Power ISA
- MIPS
Supercomputers
14 nm
12nm
10nm
7nm
5nm

Pascal

Architectures Circuit Design Conferences Floorplanning Graphics Processors

A look at Nvidia’s NVLink interconnect and the NVSwitch

May 6, 2018May 25, 2021 David Schor 12FFN, 12nm, AI, DGX-1, DGX-2, GPU, Interconnect, Nvidia, NVLink, NVSwitch, Pascal, Volta

A look at Nvidia’s NVLink interconnect and the 2-billion transistor NVSwitch that is powering Nvidia’s latest DGX-2 deep learning machine.

Top Six Articles

VLSI 2018: Samsung’s 8nm 8LPP, a 10nm extension
N3E Replaces N3; Comes In Many Flavors
The Mesh Network For Next-Generation Neoverse Chips
Samsung 5 nm and 4 nm Update
Samsung 7nm Enters Risk Production, Talks Roadmap, Scaling Boosters, and the ARM Ecosystem
TSMC Talks 7nm, 5nm, Yield, And Next-Gen 5G And HPC Packaging

Recent

Arm Launches Next-Gen Big-Core: Cortex-A725
May 29, 2024May 29, 2024 David Schor
Arm Unveils 2024 Compute Platform: 3nm, Cortex-X925, Cortex-A725, Immortalis-G925
May 29, 2024May 29, 2024 David Schor
Arm Launches Next-Gen Flagship Cortex-X925
May 29, 2024May 29, 2024 David Schor
Amazon Debuts 4th Gen Graviton
December 8, 2023December 9, 2023 David Schor
Arm Launches the Cortex-M52 For IoT; Its Smallest Processor with Helium
November 22, 2023November 22, 2023 David Schor
Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core
May 28, 2023May 28, 2023 David Schor

Random Picks

AMD launches EPYC Embedded 3000 and Ryzen Embedded V1000 SoCs

February 23, 2018May 25, 2021 David Schor

Intel Process Technology And Packaging Plans: 10nm in June, 7nm in 2021

May 11, 2019May 25, 2021 David Schor

Arm Launches Next-Gen Big-Core: Cortex-A725

May 29, 2024May 29, 2024 David Schor

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor

Samsung M5 Core Details Show Up

November 21, 2019May 25, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex Cortex-A edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Desktop Processors Mobile Processors

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Architectures Server Processors

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor

Architectures Data Processing Unit Desktop Processors Mobile Processors

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor

Architectures Desktop Processors Mobile Processors

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor

Architectures Desktop Processors Mobile Processors Server Processors

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor

Architectures Server Processors

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

ISSCC 2018: MIT’s low-power hardware crypto RISC-V IoT processor

March 17, 2018May 25, 2021 David Schor

Samsung-Esperanto Concept AI-SSD Prototype

November 21, 2021November 21, 2021 David Schor

IBM Introduces Next-Gen Z Mainframe: The z15; Wider Cores, More Cores, More Cache, Still 5.2 GHz

September 14, 2019May 25, 2021 David Schor

WikiChip Fuse Moves to a Decaying Paywall Model

May 13, 2021May 23, 2021 David Schor

A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip

November 16, 2019May 25, 2021 David Schor

Goldmont Plus detailed, large improvements, setting the stage for a 32-core model

December 26, 2017May 25, 2021 David Schor

Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs

December 12, 2019May 25, 2021 David Schor

ARM WorldView All

Architectures Desktop Processors Embedded Processors Mobile Processors Roadmaps

Arm Unveils 2024 Compute Platform: 3nm, Cortex-X925, Cortex-A725, Immortalis-G925

May 29, 2024May 29, 2024 David Schor

Architectures Desktop Processors Embedded Processors Mobile Processors

Arm Launches Next-Gen Big-Core: Cortex-A725

May 29, 2024May 29, 2024 David Schor

Architectures Desktop Processors Server Processors

Arm Launches Next-Gen Flagship Cortex-X925

May 29, 2024May 29, 2024 David Schor

Server Processors

Amazon Debuts 4th Gen Graviton

December 8, 2023December 9, 2023 David Schor

Embedded Processors Mobile Processors

Arm Launches the Cortex-M52 For IoT; Its Smallest Processor with Helium

November 22, 2023November 22, 2023 David Schor

Architectures Desktop Processors Mobile Processors Server Processors

Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core

May 28, 2023May 28, 2023 David Schor

About

WikiChip is an independent publisher based in New York. The WikiChip Fuse section publishes chips and semiconductor related news with our main site offering in-depth semiconductor resources and analysis.

WikiChip Links

Main Site
WikiChip Fuse
Newsletter

Main Site
WikiChip Fuse

Copyright © 2025 WikiChip LLC. All rights reserved.