Skip to content
Wednesday, May 18, 2022
Latest:
  • Reincarnating The 6502 Using Flexible TFT Tech For IoT
  • Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC
  • Samsung-Esperanto Concept AI-SSD Prototype
  • EUV State, NXE:3600D, and Pellicle Readiness and Industrialization
  • Intel Launches 12th Gen Core Desktop Alder Lake Processors
WikiChip Fuse

WikiChip Fuse

Your Chips and Semi News

  • Home
  • Account
  • Main Site
  • Architectures
    • x86
    • ARM
    • RISC-V
    • Power ISA
    • MIPS
  • Supercomputers
  • 14 nm
  • 12nm
  • 10nm
  • 7nm
  • 5nm

12FFN

Architectures Floorplanning Hot Chips 30 

Hot Chips 30: Nvidia Xavier SoC

September 8, 2018May 25, 2021 David Schor 12FFN, 12nm, AI, ARM, ARMv8, inference, neural processors, Nvidia, NVLink, Tegra, Xavier

An overview of the Xavier SoC which was detailed by Nvidia at Hot Chips 30.

Read more
Architectures Circuit Design Conferences Floorplanning Graphics Processors 

A look at Nvidia’s NVLink interconnect and the NVSwitch

May 6, 2018May 25, 2021 David Schor 12FFN, 12nm, AI, DGX-1, DGX-2, GPU, Interconnect, Nvidia, NVLink, NVSwitch, Pascal, Volta

A look at Nvidia’s NVLink interconnect and the 2-billion transistor NVSwitch that is powering Nvidia’s latest DGX-2 deep learning machine.

Read more

Top Six Articles

  • TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node
  • Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
  • TSMC 2021 Foundry Update: Foundry Roadmap
  • Intel Announces 20Å Node: RibbonFET Devices, PowerVia, 2024 Ramp
  • AMD 3D Stacks SRAM Bumplessly

Recent

  • Reincarnating The 6502 Using Flexible TFT Tech For IoT

    Reincarnating The 6502 Using Flexible TFT Tech For IoT

    May 8, 2022May 8, 2022 David Schor
  • Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC

    Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC

    February 20, 2022February 21, 2022 David Schor
  • Samsung-Esperanto Concept AI-SSD Prototype

    Samsung-Esperanto Concept AI-SSD Prototype

    November 21, 2021November 21, 2021 David Schor
  • EUV State, NXE:3600D, and Pellicle Readiness and Industrialization

    EUV State, NXE:3600D, and Pellicle Readiness and Industrialization

    November 20, 2021November 20, 2021 David Schor
  • Intel Launches 12th Gen Core Desktop Alder Lake Processors

    Intel Launches 12th Gen Core Desktop Alder Lake Processors

    October 27, 2021November 3, 2021 David Schor
  • TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node

    TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node

    October 26, 2021October 26, 2021 David Schor

Random Picks

Intel Launches New Comet Lake 10th Gen Mobile Processors With More Cores, LPDDR4X Memory

Intel Launches New Comet Lake 10th Gen Mobile Processors With More Cores, LPDDR4X Memory

August 21, 2019May 25, 2021 David Schor
Qualcomm launches the Centriq 2400 server family

Qualcomm launches the Centriq 2400 server family

November 8, 2017May 25, 2021 David Schor
Ice Lake Brings A New CPU, GPU, IPU, and I/Os, To Follow By Tiger Lake Next Year

Ice Lake Brings A New CPU, GPU, IPU, and I/Os, To Follow By Tiger Lake Next Year

May 12, 2019May 25, 2021 David Schor
ISSCC 2018: Intel’s Skylake-SP Mesh and  Floorplan

ISSCC 2018: Intel’s Skylake-SP Mesh and Floorplan

March 9, 2018May 25, 2021 David Schor
IBM Introduces Next-Gen Z  Mainframe: The z15; Wider Cores, More Cores, More Cache, Still 5.2 GHz

IBM Introduces Next-Gen Z Mainframe: The z15; Wider Cores, More Cores, More Cache, Still 5.2 GHz

September 14, 2019May 25, 2021 David Schor

Random Tags

2.5D packaging 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 12nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 edge computing EMIB EUV FinFET Foveros GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Bitcoin giant Bitmain enters the AI market with the BM1680 neural processor

Bitcoin giant Bitmain enters the AI market with the BM1680 neural processor

November 8, 2017May 25, 2021 David Schor
A Look at Intel Lakefield: A 3D-Stacked Single-ISA Heterogeneous Penta-Core SoC

A Look at Intel Lakefield: A 3D-Stacked Single-ISA Heterogeneous Penta-Core SoC

April 5, 2020May 25, 2021 David Schor
VLSI 2018: Next Week’s Samsung and GlobalFoundries Papers

VLSI 2018: Next Week’s Samsung and GlobalFoundries Papers

June 17, 2018May 25, 2021 David Schor
A Look at Cavium’s New High-Performance ARM Microprocessors and the Isambard Supercomputer

A Look at Cavium’s New High-Performance ARM Microprocessors and the Isambard Supercomputer

June 3, 2018May 25, 2021 David Schor
Huawei Expands Kunpeng Server CPUs, Plans SMT, SVE For Next Gen

Huawei Expands Kunpeng Server CPUs, Plans SMT, SVE For Next Gen

May 3, 2019May 25, 2021 David Schor
Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55

Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55

February 10, 2020May 25, 2021 David Schor
Intel’s Diamond Mesa Bridges The Gap Between ASIC and FPGA

Intel’s Diamond Mesa Bridges The Gap Between ASIC and FPGA

June 13, 2021June 13, 2021 David Schor

ARM WorldView All

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor
A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip
IEDM 2020 Interconnects Packaging Subscriber Only Content 

A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip

June 11, 2021June 11, 2021 David Schor
Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700
Architectures Interconnects Network-on-Chip 

Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700

May 25, 2021May 25, 2021 David Schor
Arm Launches The DSU-110 For New Armv9 CPU Clusters
Architectures Interconnects Mobile Processors 

Arm Launches The DSU-110 For New Armv9 CPU Clusters

May 25, 2021May 25, 2021 David Schor

About

WikiChip
WikiChip is an independent publisher based in New York. The WikiChip Fuse section publishes chips and semiconductor related news with our main site offering in-depth semiconductor resources and analysis.

WikiChip Links

  • Main Site
  • WikiChip Fuse
  • Newsletter
  • Main Site
  • WikiChip Fuse

Copyright © 2022 WikiChip LLC. All rights reserved.