WikiChip Fuse

Japan cancels contract, kicks out 4th fastest supercomputer amid fraud charges

David SchorSupercomputersApril 20, 2018 Tagged Green500, Gyoukou, Japan, PEZY, PEZY-SCx, Supercomputers, ThruChip Interface, TOP500

The future of Japan’s innovative trio of startups – PEZY Computing, ExaScaler, and UltraMemory – is now at risk following the termination of their supercomputer, the world’s fourth-fastest supercomputer amid fraud charges.

AMD’s Zen CPU Complex, Cache, and SMU

David SchorArchitectures, Circuit Design, ISSCC 2018April 18, 2018 Tagged 14LPP, 14nm, AMD, cache, floorplan, ISSCC, ISSCC 2017, ISSCC 2018, SRAM, x86, Zen

A look at AMD’s Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores that are incorporated into a full SoC to form complete products such as their Zeppelin die.

Pages: 1 2

AMD introduces Ryzen 2nd Gen up for pre-order

David SchorDesktop ProcessorsApril 13, 2018 Tagged 14nm, AMD, Ryzen, x86, Zen+

Ahead of its April 19th release, AMD is now offering pre-orders for their 2nd Generation, Ryzen 2000 family, desktop processors.

Qualcomm introduces a new Vision Intelligence Platform

Matt LarsonEmbedded Processors, Neural ProcessorsApril 12, 2018 Tagged 10LPE, 10nm, Adreno 615, AI, ARM, ARMv8, Hexagon 685, Kryo 300, Qualcomm, Vision Intelligence Platform

Going after the growing intelligent IoT market, Qualcomm is introducing a new Vision Intelligence Platform for accelerating camera vision processing in smart IoT applications.

Intel discloses Tremont, a Goldmont Plus successor

David SchorArchitecturesApril 4, 2018 Tagged 10nm, Atom, Intel, Tremont, x86

Intel has disclosed a new “Tremont” microarchitecture along with the release of their latest architecture ISA programming reference.

Intel unleashes 8th Gen Core Coffee Lake lineup

David SchorDesktop Processors, Mobile ProcessorsApril 3, 2018 Tagged 14nm, Coffee Lake, Core i3, Core i5, Core i7, Intel, x86, Xeon E

Intel unveils the full 8th Generation Core desktop and mobile microprocessors lineup based on their latest Coffee Lake microarchitecture.

ISSCC 2018: Intel’s Self-Powered Intelligent IoT Edge Mote

David SchorArchitectures, Embedded Processors, ISSCC 2018April 2, 2018 Tagged 14nm, AI, edge computing, energy harvesting, Intel, Intel Labs, IoT, near-threshold voltage, SoC, solar power, x86

A look at Intel’s tiny intelligent IoT edge mote operating at near-threshold voltage and harvesting solar energy for charging. Equipped with sensors and an SoC with hardware to accelerate convolutional neural networks (CNNs), the chip collects environmental sensory data and captures images which are classified on-chip and sent to a data center in order to improve and optimize agricultural fields.

Pages: 1 2

ISSCC 2018: AMD’s Zeppelin; Multi-chip routing and packaging

David SchorArchitectures, Circuit Design, Floorplanning, ISSCC 2018March 24, 2018 Tagged 14nm, 2D packaging, AMD, AMD's infinity fabric, EPYC, multi-chip package, Ryzen, x86, Zen

A look at AMD’s Zeppelin SoC and the Infinity Fabric, a multi-chip architecture used by AMD to scale their SoC design from the mainstream PC market all the way to the server market.

Pages: 1 2 3 4

ISSCC 2018: MIT’s low-power hardware crypto RISC-V IoT processor

David SchorArchitectures, Circuit Design, Embedded Processors, ISSCC 2018March 17, 2018 Tagged 65nm, crypto engine, DTLS, edge computing, IoT, ISSCC, ISSCC 2018, MIT, RISC-V

In recent years, IoT devices have been plagued with security issues. Memory and energy constraints of those low-power devices mean there is very little headroom for complex security implementations. At ISSCC 2018, a team of MIT researchers has attempted to address this problem with their low-power fully in-hardware crypto engine IoT RISC-V processor.

ISSCC 2018: Intel’s Skylake-SP Mesh and Floorplan

David SchorArchitectures, Circuit Design, Floorplanning, ISSCC 2018March 9, 2018 Tagged 14nm, floorplan, Intel, ISSCC, ISSCC 2018, Skylake, Skylake-SP, x86, Xeon Scalable

At ISSCC 2018 Intel gave us some more interesting architectural details of their latest Skylake server microprocessors which brought a new mesh interconnect, a new cache hierarchy, and wider vector operations among a large array of other enhancements.

Pages: 1 2