Intel Unveils the Tremont Microarchitecture: Going After ST Performance
Architectures Oct 24, 2019 3
Intel unveils the Tremont microarchitecture, its next-generation low-power small x86 core.
Samsung M5 Core Details Show Up
Architectures Nov 21, 2019 0
TSMC 5-Nanometer Update
ARM TechCon 2019 Nov 1, 2019 0
An update on TSMC's upcoming 5-nanometer process technology.
Samsung 5 nm and 4 nm Update
ARM TechCon 2019 Oct 19, 2019 3
Japanese AI Startup Preferred Networks Designed A Custom Half-petaFLOPS Training Chip
Architectures Nov 24, 2019 0
Japanese AI Startup Preferred Networks has been working on a custom training chip with a peak performance of half-petaFLOPS...
SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio
Architectures Nov 17, 2019 1
Intel unveils the node architecture of the Aurora Supercomputer; the system will feature Intel's first Xe GPGPU for HPC,...
Cavium Takes ARM to Petascale with Astra
Supercomputers Aug 25, 2018 0
A look at the Astra supercomputer, the most powerful ARM-based supercomputer being built for Sandia National Labs.
Conference Coverage
Intel Expands 22FFL With Production-Ready RRAM and MRAM on FinFET
Process Technologies Oct 18, 2019 0
Intel expands its 22FFL process with new production-ready MRAM and RRAM technologies.
An update on TSMC current and forthcoming logic process nodes as well as their next-generation advanced packaging technologies.
Nvidia recently presented a research chip comprising dozens of chiplets that enables them to scale from milliwatts to hundreds...
Presented at the 64th IEEE International Electron Devices Meeting (IEDM) in December, here's a look at Intel's 10-nanometer standard...
At IEDM 2017 and ISSCC 2018 Intel detailed their upcoming 10nm node, an aggressively scaled 7nm-class process technology that...
At the 2017 IEDM Sony presented their 3-layer stacked state-of-the-art CMOS image sensor (CIS) technology used to minimize rolling...
A look at the changes and enhancements that were implemented by IBM in their z14 mainframe microprocessor and system...
Attempting to address the memory bandwidth problem, the QUEST neural processor uses 3D-stacked SRAM dies along with ThruChip Interface...
AMD’s Zen CPU Complex, Cache, and SMU
Architectures Apr 18, 2018 0
A look at AMD's Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores...
A look at Cerebras Wafer-Scale Engine (WSE), a chip the size of a wafer, packing over 400K tiny AI...
A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor
Architectures Nov 10, 2019 1
A look at the microarchitecture of Intel Nervana next-generation data center training neural processor, codename Spring Crest.
IBM adds a third variant of POWER9, the POWER9 Advanced I/O (AIO) processor which incorporates the Open Memory Interface...
Intel Spring Hill: Morphing Ice Lake SoC Into A Power-Efficient Data Center Inference Accelerator
Architectures Oct 20, 2019 5
First detailed at Hot Chips 31, Intel Spring Hill morphs the Ice Lake SoC into a highly power-efficient data...
A deep dive into the custom-designed Tesla neural processing units integrated inside the company's full self-driving (FSD) chip based...
A look at the NEC SX-Aurora, their latest vector processor - increasing compute while maintaining a high B/F through...
