WikiChip Fuse

A Look At The AMD Zen 2 Core

TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO

Intel Sunny Cove Core To Deliver A Major Improvement In Single-Thread Performance, Bigger Improvements To Follow

Arm Unveils Cortex-A77, Emphasizes Single-Thread Performance

Ice Lake Brings A New CPU, GPU, IPU, and I/Os, To Follow By Tiger Lake Next Year

Intel Process Technology And Packaging Plans: 10nm in June, 7nm in 2021

Huawei Expands Kunpeng Server CPUs, Plans SMT, SVE For Next Gen

Intel’s Spring Crest NNP-L Initial Details

Intel Rolls Out Next-Gen Data Center Portfolio

Arm Launches New Neoverse N1 and E1 Server Cores

SEMICON West 2019: ASML EUV Update

David SchorSEMICON West 2019July 21, 2019 Tagged 3nm, 5nm, 7nm, ASML, EUV, High-NA, NXE:3100, NXE:3300B, NXE:3400B

An update on the current state of EUV systems which was given by ASML at SEMICON West 2019 earlier this month.

DARPA ERI: How Ayar Labs Collaboration With GF Produces A Photonics Chiplet That Can Supercharge Intel FPGAs

David SchorArchitectures, Circuit Design, ERI Summit 2019, FPGAsJuly 20, 2019 Tagged AIB, Ayar Labs, chiplet, EMIB, FPGA, GlobalFoundries, Photonics, RISC-V

From a DARPA vision and a $15 million seed to a commercialized CMOS silicon photonics product: how Ayar Labs collaboration with GF produces a photonics chiplet that can supercharge Intel FPGAs.

Intel Labs Builds A Neuromorphic System With 64 To 768 Loihi Chips: 8 Million To 100 Million Neurons

David SchorNeural ProcessorsJuly 15, 2019 Tagged 14nm, AI, Loihi, Nahuku, neuromorphic chip, Pohoiki Beach, Pohoiki Springs

Intel announced Pohoiki Beach and Pohoiki Springs, two new research neuromorphic systems capable of scaling from 64 to 768 Loihi chips with 8 million to 100 million neurons per system.

Intel Introduces Co-EMIB To Stitch Multiple 3D Die Stacks Together, Adds Omni-Directional Interconnects

David SchorInterconnects, PackagingJuly 9, 2019 Tagged 3D packaging, Co-EMIB, EMIB, Foveros, SemiCon, SemiConWest

Intel is expanding its packaging portfolio with more advanced 2.5D and 3D technologies including multiple 3D stacks and omnidirectional interconnects.

A Look At The AMD Zen 2 Core

David SchorArchitecturesJuly 6, 2019 Tagged 7nm, branch prediction, x86, Zen, Zen 2

Ahead of the highly anticipated Ryzen 3000 desktop series launch, here is a look at the AMD Zen 2 core microarchitecture.

Pages: 1 2

Nvidia Inference Research Chip Scales to Dozens of Chiplets

David SchorArchitectures, Interconnects, Neural Processors, VLSI 2019June 30, 2019 Tagged 16nm, chiplet, ground-referenced signaling, multi-chip package, neural processors, Nvidia, RISC-V

Nvidia recently presented a research chip comprising dozens of chiplets that enables them to scale from milliwatts to hundreds of watts in order to cater to different markets such as edge, mobile, automotive, and data center.

Pages: 1 2

TSMC Demonstrates A 7nm Arm-Based Chiplet Design for HPC

David SchorInterconnects, Packaging, Server Processors, VLSI 2019June 22, 2019 Tagged 7nm, ARM, ARMv8, chiplet, Cortex-A72, CoWoS, LIPINCON, VLSI 2019, VLSI Symposium

A look at a high-performance 7nm Arm-based chiplet architecture which was recently presented by TSMC at the 2019 VLSI Symposium.

TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO

David SchorProcess Technologies, VLSI 2019June 16, 2019 Tagged 7HPC, 7nm, FinFET, SDM845, SDM855, Snapdragon 800, Snapdragon 855, TSMC, VLSI 2019, VLSI Symposium

Update and analysis of TSMC 7-nanometer node low-power and high-performance cells, 2nd generation 7nm, and the design technology co-optimization (DTCO) effort that went into the Snapdragon 855 SoC.

Pages: 1 2