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Embedded Processors Mobile Processors

Arm Launches the Cortex-M52 For IoT; Its Smallest Processor with Helium

November 22, 2023November 22, 2023 David Schor ARM, ARMv8, Armv8.1, Cortex-M, Cortex-M52, Helium, M-Profile Vector Extension (MVE)

Arm Launches the Cortex-M52 For IoT; Its Smallest Processor with Helium

Architectures Desktop Processors Mobile Processors Server Processors

Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core

May 28, 2023May 28, 2023 David Schor ARM, ARMv9, ARMv9.2, Cortex, Cortex-X, Cortex-X3, Cortex-X4

Arm Introduces Its Newest Flagship Performance Core, The Cortex-X4

Architectures Desktop Processors Mobile Processors

Arm Introduces A New Big Core, The Cortex-A720

May 28, 2023May 28, 2023 David Schor ARM, ARMv9, ARMv9.2, Cortex, Cortex-A, Cortex-A715, Cortex-A720, Hunter

Arm Introduces A New Big Core, The Cortex-A720

Architectures Embedded Processors Mobile Processors

Arm Launches Next-Gen Efficiency Core; Cortex-A520

May 28, 2023May 28, 2023 David Schor ARM, ARMv9, ARMv9.2, Cortex, Cortex-A, Cortex-A510, Cortex-A520, Hayes

Arm Launches The Cortex-A520, Next-Gen Efficiency Little Core

Foundries IEDM 2022 Interconnects Process Technologies

TSMC N3, And Challenges Ahead

May 27, 2023May 27, 2023 David Schor 2023 2023 Technology Symposium, 3 nm, IEDM, IEDM 2022, N3, N3B, N3E, TSMC, TSMC Technology Symposium

A Look At TSMC N3 Process

Circuit Design Desktop Processors Interconnects Packaging Server Processors Subscriber Only Content

A Look At AMD’s 3D-Stacked V-Cache

December 27, 2022December 27, 2022 David Schor 3D V-Cache, AMD, Direct Bond Interconnect (DBI), hybrid bonding, Ryzen, subscriber only (general), System on Integrated Chips (SoIC)

[Subscription] A technical look at AMD’s 3D-Stacked V-Cache

Foundries IEDM 2022

IEDM 2022: Did We Just Witness The Death Of SRAM?

December 14, 2022December 15, 2022 David Schor 3 nm, cache, IEDM, N3, N3B, N3E, SRAM, TSMC

IEDM 2022: Did we just witness the death of SRAM? While foundries continue to show strong logic transistor scaling, SRAM scaling has completely collapsed.

Embedded Processors Mobile Processors Roadmaps Server Processors

SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

November 1, 2022November 2, 2022 David Schor P470, P670, RISC-V, SiFive

SiFive announces new high-performance RISC-V cores, bifurcating the Performance family into performance and efficiency cores.

Architectures Foundries

Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process

October 7, 2022October 7, 2022 David Schor Cadence, Intel, Intel 4, Intel Foundry Services (IFS), Intel Innovation 2022, RISC-V, SiFive, Synopsys

Intel, SiFive demonstrated high-performance RISC-V Horse Creek development platform on Intel 4 Process.

Packaging Subscriber Only Content

TSMC Demos SoIC_H for High-Bandwidth HPC Applications

October 4, 2022October 4, 2022 David Schor 2.5D packaging, 3D packaging, HPC, hybrid bonding, SoIC, SoIC_H, SRAM cube, subscriber only (general), TSMC

[Subscription] TSMC demonstrates SoIC_H for next-generation high-bandwidth HPC applications.

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