WikiChip Fuse

Ayar Labs Realizes Co-Packaged Silicon Photonics

Architectures Jan 19, 2020 0

Integrated photonics has long been considered a holy grail for communication. Ayar Labs TeraPHY chiplet represents a major step forward through the co-packaging of the optical interface along with an SoC. Read more

TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY

Foundries Jan 17, 2020 0

 

7-nanometer contributes the lion's share of wafer revenue to TSMC's fourth-quarter driven by growth... Read more

A Look At Celerity’s Second-Gen 496-Core RISC-V Mesh NoC

Architectures Jan 12, 2020 0

A look at the 496-core RISC-V manycore array, network-on-chip, and the digital PLL of... Read more

AMD Launches New Entry-Level Mobile ‘Dali’ Processors

CES 2020 Jan 9, 2020 0

AMD launches new value and entry-level mobile processors, codenamed Dali. Read more

OCP Bunch of Wires: A New Open Chiplets Interface For Organic Substrates

Hot Interconnects Jan 5, 2020 0

A look at a Bunch of Wires, a new open standard chiplets interconnect being... Read more
Japanese AI Startup Preferred Networks Designed A Custom Half-petaFLOPS Training Chip
Japanese AI Startup Preferred Networks has been working on a custom training chip with a peak performance of half-petaFLOPS...
SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio
Intel unveils the node architecture of the Aurora Supercomputer; the system will feature Intel's first Xe GPGPU for HPC,...
Cavium Takes ARM to Petascale with Astra
A look at the Astra supercomputer, the most powerful ARM-based supercomputer being built for Sandia National Labs.

Conference Coverage

A Look At Celerity’s Second-Gen 496-Core RISC-V Mesh NoC
A look at the 496-core RISC-V manycore array, network-on-chip, and the digital PLL of the Celerity open-source RISC-V tiered...
Intel Expands 22FFL With Production-Ready RRAM and MRAM on FinFET
Intel expands its 22FFL process with new production-ready MRAM and RRAM technologies.
TSMC Talks 7nm, 5nm, Yield, And Next-Gen 5G And HPC Packaging
An update on TSMC current and forthcoming logic process nodes as well as their next-generation advanced packaging technologies.
TSMC Digs Trenches In Search Of Higher Performance
TSMC leverages existing silicon in the CoWoS process to improve the power delivery system of high-performance applications through new,...
Intel 2020s Process Technology Roadmap: 10nm+++, 3nm, 2nm, and 1.4nm for 2029
Intel's process technology roadmap reveals decade-out plans, including a future 10nm+++ node and even a 1.4nm node heading into...
IEDM 2018: Intel’s 10nm Standard Cell Library and Power Delivery
Presented at the 64th IEEE International Electron Devices Meeting (IEDM) in December, here's a look at Intel's 10-nanometer standard...
ISSCC 2018: The IBM z14 Microprocessor And System Control Design
A look at the changes and enhancements that were implemented by IBM in their z14 mainframe microprocessor and system...
QUEST, A TCI-Based 3D-Stacked SRAM Neural Processor
Attempting to address the memory bandwidth problem, the QUEST neural processor uses 3D-stacked SRAM dies along with ThruChip Interface...
AMD’s Zen CPU Complex, Cache, and SMU
A look at AMD's Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores...
Ayar Labs Realizes Co-Packaged Silicon Photonics
Integrated photonics has long been considered a holy grail for communication. Ayar Labs TeraPHY chiplet represents a major step...
A Look At The Habana Inference And Training Neural Processors
A look at the Habana inference and training neural processors designed for the acceleration of data center workloads.
A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip
A look at Cerebras Wafer-Scale Engine (WSE), a chip the size of a wafer, packing over 400K tiny AI...
A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor
A look at the microarchitecture of Intel Nervana next-generation data center training neural processor, codename Spring Crest.
IBM Adds POWER9 AIO, Pushes for an Open Memory-Agnostic Interface
IBM adds a third variant of POWER9, the POWER9 Advanced I/O (AIO) processor which incorporates the Open Memory Interface...
Intel Spring Hill: Morphing Ice Lake SoC Into A Power-Efficient Data Center Inference Accelerator
First detailed at Hot Chips 31, Intel Spring Hill morphs the Ice Lake SoC into a highly power-efficient data...