Roadmaps

IBM Open Sources Power ISA, Delays POWER10 to 2021

David SchorArchitectures, OpenPOWER Summit, Roadmaps, Server ProcessorsSeptember 12, 2019 Tagged IBM, OpenPOWER, OpenPOWER Summit, OpenPOWER Summit 2019, POWER, POWER10, POWER9, PowerAXON

At the recent OpenPOWER Summit, IBM outlined their new roadmap, open-sourced the Power ISA, and made a number of additional announcements.

Leaked Intel Server Roadmap Shows Sapphire Rapids With DDR5/PCIe 5.0 For 2021, Granite Rapids For 2022

David SchorRoadmapsMay 21, 2019 Tagged 10nm, 7nm, Cooper Lake, Granite Rapids, Ice Lake, Sapphire Rapids, x86

A leaked roadmap of Intel server processors reveals some new details about their next-generation Sapphire Rapids and Granite Rapids processors.

Intel Reveals 10nm Sunny Cove Core, a New Core Roadmap, and Teases Ice Lake Chips

David SchorArchitectures, Desktop Processors, Roadmaps, Server ProcessorsDecember 23, 2018 Tagged 10nm, 7nm, AVX-512, Foveros, Golden Cove, Gracemont, Ice Lake, Palm Cove, Sunny Cove, Tremont, Willow Cove, x86

Last week Intel disclosed initial details of their next-generation core microarchitecture, Sunny Cove, which will make it into future Ice Lake client and server chips among other products.

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IBM Chooses Samsung 7nm EUV for Next-Gen POWER and Z Microprocessors

David SchorFoundries, Process Technologies, Roadmaps, Server ProcessorsDecember 20, 2018 Tagged 7LPP, 7nm, Common Platform Alliance, EUV, IBM, POWER, POWER10, Samsung, Z

IBM partners up with Samsung 7nm EUV process for their next-generation of POWER and Z microprocessors.

Arm Targets Data Centers with New Roadmaps, Architectures, and Standards

David SchorArchitectures, ARM TechCon 2018, Roadmaps, Server Processors, Supercomputing 18December 16, 2018 Tagged 5nm, 7nm, Ares, ARM, data center, neoverse, Poseidon, SBBR, SBSA, ServerReady, Zeus

Arm outlines server strategy with an ambitious plan to make a dent in the data center business that is dominated by Intel through standardization and a new roadmap with high-performance ‘server-class’ cores.

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