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  • A Look At AMD’s 3D-Stacked V-Cache
  • IEDM 2022: Did We Just Witness The Death Of SRAM?
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores
  • Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications
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4 nm

Foundries Roadmaps Subscriber Only Content 

Samsung Foundry On EUV, Pellicles, Capacity, and Yield

July 25, 2022July 25, 2022 David Schor 4 nm, 5 nm, Extreme Ultraviolet (EUV) Lithography, Samsung, Samsung Foundry, subscriber only (general)

Samsung Foundry talks about EUV, wafer capacity and mid-term plans,pPellicles, and advanced node yield.

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Foundries IEDM 2021 Process Technologies Subscriber Only Content 

A Look At Samsung’s 4LPE Process

June 26, 2022June 26, 2022 David Schor 4 nm, 4LPE, 4LPP, FinFET, Samsung, Samsung Foundry, subscriber only (general)

A look at Samsung’s last leading-edge FinFET process node, 4nm 4LPE.

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Foundries Process Technologies VLSI 2022 

A Look At Intel 4 Process Technology

June 19, 2022June 20, 2022 David Schor 4 nm, 5 nm, 7 nm, Extreme Ultraviolet (EUV) Lithography, Intel, Intel 3, Intel 4, Intel 7, Intel Foundry Services (IFS), Meteor Lake, VLSI 2022, VLSI Symposium

A look at Intel’s next-generation high-performance process technology, Intel 4.

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Foundries Process Technologies Roadmaps Subscriber Only Content 

TSMC 2021 Foundry Update: Foundry Roadmap

July 6, 2021July 6, 2021 David Schor 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, Extreme Ultraviolet (EUV) Lithography, FinFET, N2 2 nm, N3, N4, N5, N6, N7, subscriber only (general), TSMC

TSMC 2021 foundry update

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Foundries IEDM 2020 Process Technologies Roadmaps Subscriber Only Content 

Samsung Details 5nm and 4nm; Adds 8LPA, 5LPP, and 4LPP Nodes; Readies 3nm GAA For Next Year

May 21, 2021June 24, 2021 David Schor 3 nm, 4 nm, 4LPE, 4LPP, 5 nm, 5LPE, 5LPP, 7 nm, IEDM 2020, Samsung, Samsung Foundry, subscriber only (general)

Samsung revealed more details of its 5LPE process technology which recently ramped, gave a roadmap status update along with new stop-gap nodes announcement.

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Top Six Articles

  • A Look At Intel 4 Process Technology
  • TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node
  • Arm Introduces Its Confidential Compute Architecture
  • Arm Introduces The Cortex-A715
  • N3E Replaces N3; Comes In Many Flavors
  • Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

Recent

  • A Look At AMD’s 3D-Stacked V-Cache

    A Look At AMD’s 3D-Stacked V-Cache

    December 27, 2022December 27, 2022 David Schor
  • IEDM 2022: Did We Just Witness The Death Of SRAM?

    IEDM 2022: Did We Just Witness The Death Of SRAM?

    December 14, 2022December 15, 2022 David Schor
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    November 1, 2022November 2, 2022 David Schor
  • Intel, SiFive Demo High-Performance  RISC-V Horse Creek Dev Platform On Intel 4 Process

    Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process

    October 7, 2022October 7, 2022 David Schor
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    October 4, 2022October 4, 2022 David Schor
  • Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    October 1, 2022October 3, 2022 David Schor

Random Picks

Intel Stratix 10 DX Adds PCIe Gen 4.0, Cache Coherency: UPI As Stopgap

Intel Stratix 10 DX Adds PCIe Gen 4.0, Cache Coherency: UPI As Stopgap

September 20, 2019May 25, 2021 David Schor
CEA-Leti Demos a 6-Chiplet 96-Core 3D-Stacked MIPS Processor

CEA-Leti Demos a 6-Chiplet 96-Core 3D-Stacked MIPS Processor

March 1, 2020May 25, 2021 David Schor
Intel, SiFive Demo High-Performance  RISC-V Horse Creek Dev Platform On Intel 4 Process

Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process

October 7, 2022October 7, 2022 David Schor
OCP Makes a Push for an Open Chiplet Marketplace

OCP Makes a Push for an Open Chiplet Marketplace

January 4, 2020May 25, 2021 David Schor
AMD’s New EPYC 7H12: A Specially-Binned HPC Processor

AMD’s New EPYC 7H12: A Specially-Binned HPC Processor

September 20, 2019May 25, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel Intel 7 ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Nvidia Inference Research Chip Scales to Dozens of Chiplets

Nvidia Inference Research Chip Scales to Dozens of Chiplets

June 30, 2019May 25, 2021 David Schor
CEA-Leti Demos a 6-Chiplet 96-Core 3D-Stacked MIPS Processor

CEA-Leti Demos a 6-Chiplet 96-Core 3D-Stacked MIPS Processor

March 1, 2020May 25, 2021 David Schor
Intel 2020s Process Technology Roadmap: 10nm+++, 3nm, 2nm, and 1.4nm for 2029

Intel 2020s Process Technology Roadmap: 10nm+++, 3nm, 2nm, and 1.4nm for 2029

December 10, 2019May 25, 2021 David Schor
Intel Launches Stratix 10 GX 10M; 10M LEs, Two Massive Interconnected Dies

Intel Launches Stratix 10 GX 10M; 10M LEs, Two Massive Interconnected Dies

November 7, 2019May 25, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY

TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY

January 17, 2020May 25, 2021 David Schor
A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip

A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip

June 11, 2021June 11, 2021 David Schor

ARM WorldView All

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor
Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor

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