VLSI Symposium

Process Technologies VLSI 2019

Intel Expands 22FFL With Production-Ready RRAM and MRAM on FinFET

October 18, 2019 David Schor 0 Comments 22 nm, 22FFL, Intel, Intel Custom Foundry, MRAM, non-volatile memory, ReRAM, RRAM, VLSI 2019, VLSI Symposium

Intel expands its 22FFL process with new production-ready MRAM and RRAM technologies.

Packaging Process Technologies SEMICON West 2019 VLSI 2019

TSMC Talks 7nm, 5nm, Yield, And Next-Gen 5G And HPC Packaging

July 28, 2019 David Schor 3 Comments 3D packaging, 3nm, 5nm, 6nm, 7nm, CoWoS, InFO, InFO_AiP, InFO_MS, InFO_oS, N5, N5P, N6, N7, N7P, SemiConWest, SoIC, TSMC, VLSI 2019, VLSI Symposium

An update on TSMC current and forthcoming logic process nodes as well as their next-generation advanced packaging technologies.

Interconnects Packaging Server Processors VLSI 2019

TSMC Demonstrates A 7nm Arm-Based Chiplet Design for HPC

June 22, 2019 David Schor 0 Comments 7nm, ARM, ARMv8, chiplet, Cortex-A72, CoWoS, LIPINCON, TSMC, VLSI 2019, VLSI Symposium

A look at a high-performance 7nm Arm-based chiplet architecture which was recently presented by TSMC at the 2019 VLSI Symposium.

Process Technologies VLSI 2019

TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO

June 16, 2019 David Schor 6 Comments 7HPC, 7nm, FinFET, SDM845, SDM855, Snapdragon 800, Snapdragon 855, TSMC, VLSI 2019, VLSI Symposium

Update and analysis of TSMC 7-nanometer node low-power and high-performance cells, 2nd generation 7nm, and the design technology co-optimization (DTCO) effort that went into the Snapdragon 855 SoC.

Process Technologies VLSI 2018

VLSI 2018: Samsung’s 2nd Gen 7nm, EUV Goes HVM

August 4, 2018 David Schor 2 Comments 7LPP, 7nm, EUV, process technology, Samsung, VLSI 2018, VLSI Symposium

A look at Samsungâ€™s 2nd generation 7nm process that was recently disclosed at the 38th Symposium on VLSI Technology.

Process Technologies VLSI 2018

VLSI 2018: Samsung’s 8nm 8LPP, a 10nm extension

July 1, 2018 David Schor 3 Comments 10LPE, 10LPP, 10nm, 8LPP, 8nm, FinFET, Samsung, VLSI 2018, VLSI Symposium

A look at Samsungâ€™s 8nm 8LPP process that was recently disclosed at the 38th Symposium on VLSI Technology.

Process Technologies VLSI 2018

VLSI 2018: Samsung’s 11nm nodelet, 11LPP

June 30, 2018 David Schor 0 Comments 10 nm, 11 nm, 11LPP, 14 nm, FinFET, Samsung, VLSI 2018, VLSI Symposium

A look at Samsung’s 11nm 11LPP process that was recently disclosed at the 38th Symposium on VLSI Technology.

VLSI 2018

VLSI 2018: Next Week’s Samsung and GlobalFoundries Papers

June 17, 2018 David Schor 0 Comments 10 nm, 14 nm, 7 nm, 8 nm, FinFET, GlobalFoundries, Qualcomm, Samsung, VLSI 2018, VLSI Symposium

A preview of some of the process technology papers from next week’s VLSI Symposium.