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Tuesday, January 19, 2021
Latest:
  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
  • Arm’s New Cortex-M55 Breathes Helium
  • Intel Launches Lakefield: An Experiment With Multiple New Technologies
  • Arm Unveils the Cortex-A78: When Less Is More
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VLSI Symposium

Process Technologies VLSI 2019 

Intel Expands 22FFL With Production-Ready RRAM and MRAM on FinFET

October 18, 2019 David Schor 0 Comments 22 nm, 22FFL, Intel, Intel Custom Foundry, MRAM, non-volatile memory, ReRAM, RRAM, VLSI 2019, VLSI Symposium

Intel expands its 22FFL process with new production-ready MRAM and RRAM technologies.

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Packaging Process Technologies SEMICON West 2019 VLSI 2019 

TSMC Talks 7nm, 5nm, Yield, And Next-Gen 5G And HPC Packaging

July 28, 2019 David Schor 3 Comments 3D packaging, 3nm, 5nm, 6nm, 7nm, CoWoS, InFO, InFO_AiP, InFO_MS, InFO_oS, N5, N5P, N6, N7, N7P, SemiConWest, SoIC, TSMC, VLSI 2019, VLSI Symposium

An update on TSMC current and forthcoming logic process nodes as well as their next-generation advanced packaging technologies.

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Interconnects Packaging Server Processors VLSI 2019 

TSMC Demonstrates A 7nm Arm-Based Chiplet Design for HPC

June 22, 2019 David Schor 0 Comments 7nm, ARM, ARMv8, chiplet, Cortex-A72, CoWoS, LIPINCON, TSMC, VLSI 2019, VLSI Symposium

A look at a high-performance 7nm Arm-based chiplet architecture which was recently presented by TSMC at the 2019 VLSI Symposium.

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Process Technologies VLSI 2019 

TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO

June 16, 2019 David Schor 6 Comments 7HPC, 7nm, FinFET, SDM845, SDM855, Snapdragon 800, Snapdragon 855, TSMC, VLSI 2019, VLSI Symposium

Update and analysis of TSMC 7-nanometer node low-power and high-performance cells, 2nd generation 7nm, and the design technology co-optimization (DTCO) effort that went into the Snapdragon 855 SoC.

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Process Technologies VLSI 2018 

VLSI 2018: Samsung’s 2nd Gen 7nm, EUV Goes HVM

August 4, 2018 David Schor 2 Comments 7LPP, 7nm, EUV, process technology, Samsung, VLSI 2018, VLSI Symposium

A look at Samsung’s 2nd generation 7nm process that was recently disclosed at the 38th Symposium on VLSI Technology.

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Process Technologies VLSI 2018 

VLSI 2018: Samsung’s 8nm 8LPP, a 10nm extension

July 1, 2018 David Schor 3 Comments 10LPE, 10LPP, 10nm, 8LPP, 8nm, FinFET, Samsung, VLSI 2018, VLSI Symposium

A look at Samsung’s 8nm 8LPP process that was recently disclosed at the 38th Symposium on VLSI Technology.

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Process Technologies VLSI 2018 

VLSI 2018: Samsung’s 11nm nodelet, 11LPP

June 30, 2018 David Schor 0 Comments 10 nm, 11 nm, 11LPP, 14 nm, FinFET, Samsung, VLSI 2018, VLSI Symposium

A look at Samsung’s 11nm 11LPP process that was recently disclosed at the 38th Symposium on VLSI Technology.

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VLSI 2018 

VLSI 2018: Next Week’s Samsung and GlobalFoundries Papers

June 17, 2018 David Schor 0 Comments 10 nm, 14 nm, 7 nm, 8 nm, FinFET, GlobalFoundries, Qualcomm, Samsung, VLSI 2018, VLSI Symposium

A preview of some of the process technology papers from next week’s VLSI Symposium.

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Top Six Articles

  • TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO
  • IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects
  • TSMC Details 5 nm
  • TSMC Ramps 5nm, Discloses 3nm to Pack Over a Quarter-Billion Transistors Per Square Millimeter
  • ISSCC 2018: AMD’s Zeppelin; Multi-chip routing and packaging
  • VLSI 2018: Samsung’s 2nd Gen 7nm, EUV Goes HVM

Recent

  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10
  • Arm’s New Cortex-M55 Breathes Helium

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
  • Intel Launches Lakefield: An Experiment With Multiple New Technologies

    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    June 15, 2020 David Schor 3
  • Arm Unveils the Cortex-A78: When Less Is More

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0
  • Arm Cortex-X1: The First From The Cortex-X Custom Program

    Arm Cortex-X1: The First From The Cortex-X Custom Program

    May 26, 2020 David Schor 0
  • Comment
  • Recent
  • Steffen Eilers says:

    Yes....

  • Steffen says:

    Really exited for the time when ARM tries to serio...

  • Piotr says:

    Depends on what you're comparing. N6 manufacturing...

  • espinozahg says:

    Hey, everybody talks about GPU FLOPS but nobody ab...

  • Filipe says:

    O bom é q a arm tá longe de alcançar esse pata...

  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10
    Arm’s New Cortex-M55 Breathes Helium

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    June 15, 2020 David Schor 3
    Arm Unveils the Cortex-A78: When Less Is More

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0

    Random Picks

    Intel to leverage EMIBs to create mobile processors with discrete AMD graphics

    Intel to leverage EMIBs to create mobile processors with discrete AMD graphics

    November 7, 2017 David Schor 0
    Intel Labs Builds A Neuromorphic System With 64 To 768 Loihi Chips: 8 Million To 100 Million Neurons

    Intel Labs Builds A Neuromorphic System With 64 To 768 Loihi Chips: 8 Million To 100 Million Neurons

    July 15, 2019 David Schor 0
    VLSI 2018: Next Week’s Samsung and GlobalFoundries Papers

    VLSI 2018: Next Week’s Samsung and GlobalFoundries Papers

    June 17, 2018 David Schor 0
    BrainChip Discloses Akida, A Neuromorphic SoC

    BrainChip Discloses Akida, A Neuromorphic SoC

    September 28, 2018 David Schor 0
    Intel Launches Desktop Xeon E, Their Fastest Entry-Level Workstation Processors

    Intel Launches Desktop Xeon E, Their Fastest Entry-Level Workstation Processors

    July 13, 2018 David Schor 0

    Random Tags

    2.5D packaging 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 12nm 14 nm 16nm AI AMD ARM ARMv8 chiplet Coffee Lake Core i5 Core i7 edge computing EMIB EUV FinFET Foveros FPGA GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen Zen 2

    x86 WorldView All

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
    Architectures 

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10

    Intel publishes details of its upcoming Advanced Matrix Extension (AMX), an x86 extension set to debut with Sapphire Rapids that introduces a new matrix register file and accompanying matrix operations.

    Centaur New x86 Server Processor Packs an AI Punch
    Architectures Neural Processors Server Processors 

    Centaur New x86 Server Processor Packs an AI Punch

    January 24, 2020 David Schor 3
    Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs
    Desktop Processors Mobile Processors Roadmaps Server Processors 

    Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs

    December 12, 2019 David Schor 0
    Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512
    Architectures Embedded Processors Neural Processors Server Processors 

    Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512

    December 9, 2019 David Schor 3
    SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio
    Architectures Roadmaps Server Processors Supercomputers Supercomputing 19 

    SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio

    November 17, 2019 David Schor 1
    AMD Announces 3rd Gen Ryzen Threadripper
    Desktop Processors Server Processors 

    AMD Announces 3rd Gen Ryzen Threadripper

    November 8, 2019 David Schor 0

    Random

    SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio

    SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio

    November 17, 2019 David Schor 1
    Intel silently launches Knights Mill

    Intel silently launches Knights Mill

    December 18, 2017 David Schor 0
    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    Intel axes Knights Hill, plans a new microarchitecture for exascale

    Intel axes Knights Hill, plans a new microarchitecture for exascale

    November 14, 2017 David Schor 0
    Intel unleashes 8th Gen Core Coffee Lake lineup

    Intel unleashes 8th Gen Core Coffee Lake lineup

    April 3, 2018 David Schor 0
    Intel Starts Shipping Initial Nervana NNP Lineup

    Intel Starts Shipping Initial Nervana NNP Lineup

    December 6, 2019 David Schor 1
    Intel Launches Desktop Xeon E, Their Fastest Entry-Level Workstation Processors

    Intel Launches Desktop Xeon E, Their Fastest Entry-Level Workstation Processors

    July 13, 2018 David Schor 0

    ARM WorldView All

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support
    Roadmaps Server Processors 

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    Arm’s New Cortex-M55 Breathes Helium
    Architectures Embedded Processors 

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
    Arm Unveils the Cortex-A78: When Less Is More
    Architectures Mobile Processors 

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0
    Arm Cortex-X1: The First From The Cortex-X Custom Program
    Architectures Mobile Processors 

    Arm Cortex-X1: The First From The Cortex-X Custom Program

    May 26, 2020 David Schor 0
    Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55
    Architectures Neural Processors 

    Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55

    February 10, 2020 David Schor 0
    Arm Ethos is for Ubiquitous AI At the Edge
    Architectures Linley Processor Conference Neural Processors 

    Arm Ethos is for Ubiquitous AI At the Edge

    February 6, 2020 David Schor 0

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