VLSI Symposium – WikiChip Fuse

VLSI 2018: Samsung’s 2nd Gen 7nm, EUV Goes HVM

David SchorProcess Technologies, VLSI 2018August 4, 2018 Tagged 7LPP, 7nm, EUV, process technology, Samsung, VLSI 2018, VLSI Symposium

A look at Samsung’s 2nd generation 7nm process that was recently disclosed at the 38th Symposium on VLSI Technology.

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VLSI 2018: Samsung’s 8nm 8LPP, a 10nm extension

David SchorProcess Technologies, VLSI 2018July 1, 2018 Tagged 10LPE, 10LPP, 10nm, 8LPP, 8nm, FinFET, Samsung, VLSI 2018, VLSI Symposium

A look at Samsung’s 8nm 8LPP process that was recently disclosed at the 38th Symposium on VLSI Technology.

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VLSI 2018: Samsung’s 11nm nodelet, 11LPP

David SchorProcess Technologies, VLSI 2018June 30, 2018 Tagged 10nm, 11LPP, 11nm, 14nm, FinFET, Samsung, VLSI 2018, VLSI Symposium

A look at Samsung’s 11nm 11LPP process that was recently disclosed at the 38th Symposium on VLSI Technology.

VLSI 2018: Next Week’s Samsung and GlobalFoundries Papers

David SchorVLSI 2018June 17, 2018 Tagged 10nm, 14nm, 7nm, 8nm, FinFET, GlobalFoundries, Qualcomm, Samsung, VLSI 2018, VLSI Symposium

A preview of some of the process technology papers from next week’s VLSI Symposium.