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Friday, April 23, 2021
Latest:
  • Intel Launches 3rd Gen Ice Lake Xeon Scalable
  • Arm Highlights Near-Term Roadmap
  • Arm Launches ARMv9
  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
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N5P

Foundries Process Technologies Roadmaps 

TSMC Ramps 5nm, Discloses 3nm to Pack Over a Quarter-Billion Transistors Per Square Millimeter

April 17, 2020 David Schor 6 Comments 3 nm, 5 nm, FinFET, N3, N5, N5P, N7, N7P, TSMC

TSMC reports a flat Q1 amid the COVID-19 pandemic, ramps its 5nm node with good yield and discloses key 3-nanometer (N3) details. N3 will be a full node jump over N5 and is expected to offer over a quarter-billion transistors per each millimeter square of silicon.

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Foundries IEDM 2019 ISSCC 2020 Process Technologies 

TSMC Details 5 nm

March 21, 2020 David Schor 4 Comments 5 nm, 7 nm, EUV, N5, N5P, TSMC

TSMC details its 5-nanometer node for mobile and HPC applications. The process features the industry’s highest density transistors with a high-mobility channel and highest-density SRAM cells.

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Packaging Process Technologies SEMICON West 2019 VLSI 2019 

TSMC Talks 7nm, 5nm, Yield, And Next-Gen 5G And HPC Packaging

July 28, 2019 David Schor 3 Comments 3D packaging, 3nm, 5nm, 6nm, 7nm, CoWoS, InFO, InFO_AiP, InFO_MS, InFO_oS, N5, N5P, N6, N7, N7P, SemiConWest, SoIC, TSMC, VLSI 2019, VLSI Symposium

An update on TSMC current and forthcoming logic process nodes as well as their next-generation advanced packaging technologies.

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Top Six Articles

  • A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip
  • TSMC Details 5 nm
  • Intel Launches 3rd Gen Ice Lake Xeon Scalable
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
  • Arm Unveils the Cortex-A78: When Less Is More
  • IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects

Recent

  • Intel Launches 3rd Gen Ice Lake Xeon Scalable

    Intel Launches 3rd Gen Ice Lake Xeon Scalable

    April 6, 2021April 6, 2021 David Schor 1
  • Arm Highlights Near-Term Roadmap

    Arm Highlights Near-Term Roadmap

    April 4, 2021April 5, 2021 David Schor 0
  • Arm Launches ARMv9

    Arm Launches ARMv9

    March 30, 2021March 30, 2021 David Schor 3
  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10
  • Arm’s New Cortex-M55 Breathes Helium

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
  • Comment
  • Recent
  • JayN says:

    Interesting addition of avx512 IFMA. A 2018 artic...

  • Briny says:

    Given how often secure architectures have been bro...

  • Piotr says:

    Will SVE2 be mandatory in ARMv9 or not?...

  • Asd says:

    A popup asked me to comment, so here's a comment!...

  • Not Ludwig says:

    Intel has already canceled this chip so it doesn't...

  • Intel Launches 3rd Gen Ice Lake Xeon Scalable

    Intel Launches 3rd Gen Ice Lake Xeon Scalable

    April 6, 2021April 6, 2021 David Schor 1
    Arm Highlights Near-Term Roadmap

    Arm Highlights Near-Term Roadmap

    April 4, 2021April 5, 2021 David Schor 0
    Arm Launches ARMv9

    Arm Launches ARMv9

    March 30, 2021March 30, 2021 David Schor 3
    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10

    Random Picks

    AMD’s Zen CPU Complex, Cache, and SMU

    AMD’s Zen CPU Complex, Cache, and SMU

    April 18, 2018 David Schor 0
    Intel Looks to Advanced 3D Packaging For More-than-Moore to Supplement 10- and 7-Nanometer Nodes

    Intel Looks to Advanced 3D Packaging For More-than-Moore to Supplement 10- and 7-Nanometer Nodes

    December 22, 2018 David Schor 1
    A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor

    A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor

    November 10, 2019 David Schor 1
    DARPA ERI: HIVE and Intel PUMA Graph Processor

    DARPA ERI: HIVE and Intel PUMA Graph Processor

    August 4, 2019 David Schor 0
    TSMC Details 5 nm

    TSMC Details 5 nm

    March 21, 2020 David Schor 4

    Random Tags

    2.5D packaging 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 12nm 14 nm 16nm AI AMD ARM ARMv8 chiplet Coffee Lake Core i5 Core i7 edge computing EMIB EUV FinFET Foveros FPGA GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen Zen 2

    x86 WorldView All

    Intel Launches 3rd Gen Ice Lake Xeon Scalable
    Architectures Server Processors 

    Intel Launches 3rd Gen Ice Lake Xeon Scalable

    April 6, 2021April 6, 2021 David Schor 1

    Intel launches its 3rd Generation Xeon Scalable, formerly Ice Lake. Fabricated on the company’s 10nm process, those server chips go up to 40 Sunny Cove cores and offer a 20% IPC improvement over the prior generation.

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
    Architectures 

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10
    Centaur New x86 Server Processor Packs an AI Punch
    Architectures Neural Processors Server Processors 

    Centaur New x86 Server Processor Packs an AI Punch

    January 24, 2020 David Schor 3
    Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs
    Desktop Processors Mobile Processors Roadmaps Server Processors 

    Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs

    December 12, 2019 David Schor 0
    Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512
    Architectures Embedded Processors Neural Processors Server Processors 

    Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512

    December 9, 2019 David Schor 3
    SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio
    Architectures Roadmaps Server Processors Supercomputers Supercomputing 19 

    SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio

    November 17, 2019 David Schor 1

    Random

    Intel Sunny Cove Core To Deliver A Major Improvement In Single-Thread Performance, Bigger Improvements To Follow

    Intel Sunny Cove Core To Deliver A Major Improvement In Single-Thread Performance, Bigger Improvements To Follow

    May 28, 2019 David Schor 2
    Chuck Peddle: Personal Computer Pioneer, Dies At 82

    Chuck Peddle: Personal Computer Pioneer, Dies At 82

    December 24, 2019 David Schor 3
    Intel silently launches Knights Mill

    Intel silently launches Knights Mill

    December 18, 2017 David Schor 0
    ISSCC 2018: Intel’s Skylake-SP Mesh and  Floorplan

    ISSCC 2018: Intel’s Skylake-SP Mesh and Floorplan

    March 9, 2018 David Schor 0
    IEDM 2017: Intel details 22FFL, a relaxed 14nm process for foundry customers, targets mobile and RF apps

    IEDM 2017: Intel details 22FFL, a relaxed 14nm process for foundry customers, targets mobile and RF apps

    December 15, 2017 David Schor 2
    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    GlobalFoundries 14HP process, a marriage of two technologies

    GlobalFoundries 14HP process, a marriage of two technologies

    March 2, 2018 David Schor 2

    ARM WorldView All

    Arm Highlights Near-Term Roadmap
    Roadmaps 

    Arm Highlights Near-Term Roadmap

    April 4, 2021April 5, 2021 David Schor 0
    Arm Launches ARMv9
    Architectures Roadmaps 

    Arm Launches ARMv9

    March 30, 2021March 30, 2021 David Schor 3
    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support
    Roadmaps Server Processors 

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    Arm’s New Cortex-M55 Breathes Helium
    Architectures Embedded Processors 

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
    Arm Unveils the Cortex-A78: When Less Is More
    Architectures Mobile Processors 

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0
    Arm Cortex-X1: The First From The Cortex-X Custom Program
    Architectures Mobile Processors 

    Arm Cortex-X1: The First From The Cortex-X Custom Program

    May 26, 2020 David Schor 0

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