WikiChip Fuse
Intel Launches Stratix 10 GX 10M; 10M LEs, Two Massive Interconnected Dies

Intel launches the industry’s highest-capacity FPGA; 10-million LEs comprising two large FPGA dies interconnected using the company’s 2.5D EMIB packaging technology.

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Intel Looks to Advanced 3D Packaging For More-than-Moore to Supplement 10- and 7-Nanometer Nodes

At the recent Intel Architecture Day, the company unveiled their latest advanced packaging technology called Foveros, a face-to-face three-dimensional (3D) die stacking packaging technology in an effort to assist with the slowing of Moore’s Law.

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Samsung 7nm Enters Risk Production, Talks Roadmap, Scaling Boosters, and the ARM Ecosystem

Samsung gives an update on their 7nm EUV-based process, details the foundry technology roadmap down to 3nm and the ARM ecosystem that follows.

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Hot Chips 30: Intel Kaby Lake G

A look at Intel’s current generation of Thin & Light processors with high-performance graphics, formerly known as Kaby Lake G, from Hot Chips 30.

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IEDM 2017: AMD’s grand vision for the future of HPC

Capping off a great year, AMD CEO Lisa Su opening address at IEDM 2017 highlighted key challenges for the future, predicting a paradigm shift in the design of processors and systems that will deliver another decade of performance gains.

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