Interconnects

Ayar Labs Realizes Co-Packaged Silicon Photonics

Architectures Circuit Design Hot Chips 31 Interconnects Packaging January 19, 2020 0

Integrated photonics has long been considered a holy grail for communication. Ayar Labs TeraPHY chiplet represents a major step forward through the co-packaging of the optical interface along with an SoC.

OCP Bunch of Wires: A New Open Chiplets Interface For Organic Substrates

Hot Interconnects Hot Interconnects 26 Interconnects January 5, 2020 0

A look at a Bunch of Wires, a new open standard chiplets interconnect being proposed by the OCP ODSA group intended for standard organic multi-chip packages as a cheaper alternative to silicon interposers and bridges.

OCP Makes a Push for an Open Chiplet Marketplace

Interconnects Packaging January 4, 2020 0

Jumping ahead of emerging semiconductor trends, the OCP new Open Domain-Specific Architecture subgroup makes a push for an open and standardized chiplet interface and marketplace.

TSMC Digs Trenches In Search Of Higher Performance

IEDM 2019 Interconnects Packaging Process Technologies December 14, 2019 0

TSMC leverages existing silicon in the CoWoS process to improve the power delivery system of high-performance applications through new, deep trench capacitors, codename iCAPs.

A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip

Architectures Hot Chips 31 Interconnects Neural Processors Packaging November 16, 2019 0

A look at Cerebras Wafer-Scale Engine (WSE), a chip the size of a wafer, packing over 400K tiny AI cores using 1.2 trillion transistors on a half square foot of silicon.

IBM Adds POWER9 AIO, Pushes for an Open Memory-Agnostic Interface

Architectures Hot Chips 31 Interconnects Server Processors November 3, 2019 0

IBM adds a third variant of POWER9, the POWER9 Advanced I/O (AIO) processor which incorporates the Open Memory Interface (OMI), a new open memory-agnostic interface.

GlobalFoundries, Arm Demonstrate High-Density 3D Stacked Mesh Interconnect for HPC Applications

Architectures Interconnects Packaging Process Technologies September 21, 2019 2

GlobalFoundries and Arm demonstrate a 3D mesh interconnect design using highly-dense hybrid bonding 3D stacking technology intended for HPC applications.

A Look At The Ice Lake Thunderbolt 3 Integration

Architectures Interconnects August 11, 2019 0

At look the Ice Lake Thunderbolt 3 integration, Intel’s biggest integration since the graphics on Sandy Bridge.

Intel Introduces Co-EMIB To Stitch Multiple 3D Die Stacks Together, Adds Omni-Directional Interconnects

Interconnects Packaging July 9, 2019 2

Intel is expanding its packaging portfolio with more advanced 2.5D and 3D technologies including multiple 3D stacks and omnidirectional interconnects.

Nvidia Inference Research Chip Scales to Dozens of Chiplets

Architectures Interconnects Neural Processors VLSI 2019 June 30, 2019 0

Nvidia recently presented a research chip comprising dozens of chiplets that enables them to scale from milliwatts to hundreds of watts in order to cater to different markets such as edge, mobile, automotive, and data center.