TSMC – WikiChip Fuse

QUEST, A TCI-Based 3D-Stacked SRAM Neural Processor

David SchorArchitectures, Circuit Design, ISSCC 2018, Neural ProcessorsApril 25, 2018 Tagged 3D packaging, 40 nm, 40LP, AI, die stacking, Hokkaido University, ISSCC, ISSCC 2018, Keio University, process technology, TCI, ThruChip Interface, TSMC, TSV

Attempting to address the memory bandwidth problem, the QUEST neural processor uses 3D-stacked SRAM dies along with ThruChip Interface wireless communication technology to deliver sufficiently high bandwidth to sustain peak processing performance.

The RISC-V momentum continues with the GAP8, a new IoT/AI Application Processor

David SchorEmbedded Processors, Neural ProcessorsFebruary 28, 2018 Tagged 55LP, 55nm, AI, Deep Learning, edge computing, GreenWaves, IoT, RISC-V, TSMC

The RISC-V momentum continues with the the launch of the GAP8, an IoT/AI ultra-low power application processor by GreenWaves, a France-based startup. The chip is designed for lengthy autonomous battery-powered edge/IoT inference operations.

Zhaoxin launches their highest-performance Chinese x86 chips

David SchorDesktop Processors, Mobile Processors, Server ProcessorsJanuary 21, 2018 Tagged 28nm, China, HLMC, KaisHeng, KaiXian, TSMC, VIA Technologies, x86, Zhaoxin

Zhaoxin has launched the highest-performance domestic Chinese x86 chips based on the WuDaoKou microarchitecture. Zhaoxin new chips are a brand new SoC design featuring higher performance cores, a new DDR4 memory controller and integrated graphics.

Esperanto exits stealth mode, aims at AI with a 4,096-core 7nm RISC-V monster

David SchorManycore Processors, Neural ProcessorsJanuary 1, 2018 Tagged 7nm, AI, Esperanto, HBM, RISC-V, TSMC

Exiting stealth mode, Esperanto, a small start-up lead by Dave Ditzel has unveiled their high-performance RISC-V cores they have been working on. Their first product will be a 4,096-core manycore processor designed for accelerating AI workloads.

The 2,048-core PEZY-SC2 sets a Green500 record

David SchorManycore Processors, Processors, SupercomputersNovember 1, 2017 Tagged 16FF+, 16nm, 28HPC+, 3D packaging, Green500, liquid immersion, MIPS, MIPS64, PEZY, PEZY-SCx, SMT, Supercomputers, ThruChip Interface, TSMC, Xeon D, ZettaScaler

PEZY-SC2 is PEZY’s newest 16nm a many-core processor featuring 2,048 cores that is powering the world’s most power-efficient supercomputer. The chip is the first to use a unique 3D packaging interconnect technology known as TCI in order to achieve a memory bandwidth of over 2 TB/s.