After months of speculation, Intel has confirmed that a new mobile processor is in the works that combines their 8th generation Core H mobile processors with a custom-to-IntelÂ discrete graphics chip from AMD’s Radeon. For us at WikiChip, the real story is in the packaging – EMIB &Â heterogeneous integration is entering the PC market.
AsÂ Moore’s Law increases in complexity and cost, theÂ semiconductor industry looks for various other aspects of the chip to improve.Â Heterogeneous integration refers toÂ the assembly and packaging of multiple separate components onto a single package in order to enhance the overall qualities of the system. With yesterday’s announcement, the chip giant will make use of itsÂ patented technology to package memory, GPUs, and CPUs by three differentÂ manufacturers to create a single enhanced chip.
Using EMIB to Rework Gaming Laptops
In today’s standardÂ enthusiast’s gaming laptops, the three major components are the CPU, GPU, andÂ dedicated graphics memory.Â Separately, those components take up a considerable amount of board area.
Intel’s new chip will use a new multi-chip 3D packaging solution. Embedded multi-die interconnect bridge or EMIBs are Intel’s newÂ state-of-the-artÂ interconnect technology that uses a small silicon chip embedded in the underlying package substrate in order to connect the I/O bumps of one die to the I/O bumps of a second die. This is a competing solution to alternative implementations such as those that use a large piece of silicon interposer sitting on top of the package substrate, spanning the entire length of the dies being integrated.
Intel’s heterogeneous integration is not only cheaper through reduced complexity, but in this case it also offers higher performance and lower power. It’s important to note that EMIBs are not cheap, but they are considerably cheaper than using a fullÂ interposer strip like the one AMD uses. But even this is only true provided the yield is good, an aspect of their manufacturing process that Intel has been avoiding discussing recently. Perhaps the most important benefit of this solution is that utilizing devices should result in a smaller form factor. Intel touts that this solution will also result in thinner laptops, but this is only partially true. This chip only results in thinner laptops when compared to existing laptops that use discrete GPUs with HBM and an interposer; it is not thinner than existing solutions such as in the image above where all the components are distributed across the board.
In this product, Intel intends on using an EMIB to link the discrete graphics die from AMDâ€™s Radeon Technologies Group to its dedicated high-bandwidth memory. The high-bandwidth memory consists of a series of vertically stacked memory chips interconnected using through-silicon vias (TSV) which are normally connected to the GPU using an interposer. In Intel’s case, the interposer is eliminated and an EMIB is used.
Intel has stated that the AMD GPU is a semi-custom design. To work well with Intel’s EMIB solution, the physical layout of AMD’s die actually has to be modified such that the HBM I/O bumps are as close as possible to the edge of the die. It’s worth noting that the bumps are smaller and denser because the wires are shorter.Â The short wires used by EMIB improves the performance of drivers through lower resistance. Beyond this, no additional information was disclosed regarding the design of the GPU.
We have confirmed with Intel that the CPU is not connected to the GPU using an EMIB. So it appears to be using the standard package traces to link the two, likely connected to the CPU’s standard x16 PCIe lanes. The reason for this is not immediately obvious, but we think it’s heat. Cooling a mobile chip in a thin laptop is already hard enough, and a GPU consumes more power than the CPU. Packaging both together in 1/4 or 1/3 of the area and things won’t be getting any better. In the image of the chip below provided by Intel we can see that an effort was made to distance the GPU/HBM from the CPU as much as possible to spread the heat across a larger surface area. Doing so inherently eliminates the possibility of using an EMIB to link the two components.
The possibilities are great with this interconnect technology andÂ regardless of the motives behind this product, we are excited to see EMIB entering HVM and into the PC market.