WikiChip Fuse
AMD Launches Ryzen Pro 4000 Series

AMD launches its Zen 2-based Ryzen Pro 4000 series for enterprise customers.

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TSMC Details 5 nm

TSMC details its 5-nanometer node for mobile and HPC applications. The process features the industry’s highest density transistors with a high-mobility channel and highest-density SRAM cells.

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TSMC Announces 2x Reticle CoWoS For Next-Gen 5nm HPC Applications

TSMC announces an enhancement to its CoWoS packaging technology with support for up to 2x the reticle size. The new technology is ready for next-generation 5-nanometer HPC applications.

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Radeon RX 5700: Navi and the RDNA Architecture

A look at AMD’s Radeon RX 5700 GPU built on a 7-nanometer process based on the new Navi microarchitecture and RDNA graphics architecture.

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7nm Boosted Zen 2 Capabilities but Doubled the Challenges

The transition to 7 nm greatly enhanced AMD silicon capabilities but introduced new drastic design challenges that required new place and route methodologies and wire engineering.

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Intel 2020s Process Technology Roadmap: 10nm+++, 3nm, 2nm, and 1.4nm for 2029

Intel’s process technology roadmap reveals decade-out plans, including a future 10nm+++ node and even a 1.4nm node heading into 2029.

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Samsung M5 Core Details Show Up

Samsung details the high-level changes to the Exynos M5 core found in the Exynos 990.

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SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio

Intel unveils the node architecture of the Aurora Supercomputer; the system will feature Intel’s first Xe GPGPU for HPC, 7nm Ponte Vecchio.

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Marvell Lays Out ARM Server Roadmap

Marvell outlines its current and future Arm server microprocessor roadmap, aiming at a 2-year cadence with greater than 2x performance gen-over-gen.

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AMD Announces 3rd Gen Ryzen Threadripper

AMD announces 3rd-generation Ryzen Threadripper microprocessors with up to 32 cores.

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