7 nm – Page 2 – WikiChip Fuse

Foundries

Q1 2021 Foundry Update: Spending Bonanza

May 18, 2021May 23, 2021 David Schor 10 nm, 3 nm, 5 nm, 7 nm, FinFET, GAA, Intel, Samsung, SMIC, TSMC

A look at the current state of leading-edge foundries for the first quarter of 2021.

Mobile Processors

AMD Launches Ryzen Pro 4000 Series

May 7, 2020May 23, 2021 David Schor 7 nm, AMD, Ryzen, Ryzen Pro, Zen 2

AMD launches its Zen 2-based Ryzen Pro 4000 series for enterprise customers.

Foundries IEDM 2019 ISSCC 2020 Process Technologies

TSMC Details 5 nm

March 21, 2020May 25, 2021 David Schor 5 nm, 7 nm, EUV, N5, N5P, TSMC

TSMC details its 5-nanometer node for mobile and HPC applications. The process features the industry’s highest density transistors with a high-mobility channel and highest-density SRAM cells.

Interconnects Packaging Process Technologies

TSMC Announces 2x Reticle CoWoS For Next-Gen 5nm HPC Applications

March 3, 2020May 25, 2021 David Schor 2.5D packaging, 5 nm, 7 nm, CoWoS, interposer

TSMC announces an enhancement to its CoWoS packaging technology with support for up to 2x the reticle size. The new technology is ready for next-generation 5-nanometer HPC applications.

Architectures Circuit Design Graphics Processors ISSCC 2020

Radeon RX 5700: Navi and the RDNA Architecture

February 23, 2020May 25, 2021 David Schor 7 nm, AMD, ISSCC, ISSCC 2020, N7P, Navi, Radeon, Radeon RX 5700

A look at AMD’s Radeon RX 5700 GPU built on a 7-nanometer process based on the new Navi microarchitecture and RDNA graphics architecture.

Architectures Floorplanning Interconnects ISSCC 2020

7nm Boosted Zen 2 Capabilities but Doubled the Challenges

February 21, 2020May 25, 2021 David Schor 14 nm, 7 nm, AMD, capacitance, GlobalFoundries, ISSCC, ISSCC 2020, resistance, TSMC, wire delay, Zen, Zen 2

The transition to 7 nm greatly enhanced AMD silicon capabilities but introduced new drastic design challenges that required new place and route methodologies and wire engineering.