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Sunday, June 26, 2022
Latest:
  • A Look At Samsung’s 4LPE Process
  • A Look At Intel 4 Process Technology
  • Samsung 17nm follows Intel 16
  • Reincarnating The 6502 Using Flexible TFT Tech For IoT
  • Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC
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Aurora

Architectures Roadmaps Server Processors Supercomputers Supercomputing 19 

SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio

November 17, 2019May 25, 2021 David Schor 10 nm, 7 nm, Aurora, Intel, Sapphire Rapids, Supercomputer, Supercomputers, x86, Xe

Intel unveils the node architecture of the Aurora Supercomputer; the system will feature Intel’s first Xe GPGPU for HPC, 7nm Ponte Vecchio.

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Supercomputers 

Intel axes Knights Hill, plans a new microarchitecture for exascale

November 14, 2017May 25, 2021 David Schor 10nm, Aurora, Cray, DoE, exascale, Intel, x86

In preparation for the United States’ first exascale supercomputer, Intel announces they are cancelling next-generation Xeon Phi processors (codename Knights Hill) in favor of a brand new platform and microarchitecture specifically designed for exascale.

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Top Six Articles

  • A Look At Intel 4 Process Technology
  • A Look At Samsung’s 4LPE Process
  • TSMC Details 5 nm
  • IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects
  • TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node
  • TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO

Recent

  • A Look At Samsung’s 4LPE Process

    A Look At Samsung’s 4LPE Process

    June 26, 2022June 26, 2022 David Schor
  • A Look At Intel 4 Process Technology

    A Look At Intel 4 Process Technology

    June 19, 2022June 20, 2022 David Schor
  • Samsung 17nm follows Intel 16

    Samsung 17nm follows Intel 16

    May 22, 2022May 22, 2022 David Schor
  • Reincarnating The 6502 Using Flexible TFT Tech For IoT

    Reincarnating The 6502 Using Flexible TFT Tech For IoT

    May 8, 2022May 8, 2022 David Schor
  • Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC

    Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC

    February 20, 2022February 21, 2022 David Schor
  • Samsung-Esperanto Concept AI-SSD Prototype

    Samsung-Esperanto Concept AI-SSD Prototype

    November 21, 2021November 21, 2021 David Schor

Random Picks

Intel Launches 10th Gen Comet Lake vPro Processors

Intel Launches 10th Gen Comet Lake vPro Processors

May 13, 2020May 23, 2021 David Schor
Arm Launches ARMv9

Arm Launches ARMv9

March 30, 2021May 23, 2021 David Schor
Esperanto exits stealth mode, aims at AI with a 4,096-core 7nm RISC-V monster

Esperanto exits stealth mode, aims at AI with a 4,096-core 7nm RISC-V monster

January 1, 2018May 25, 2021 David Schor
Intel Updates Apollo Lake: More LPC Reliability Issues

Intel Updates Apollo Lake: More LPC Reliability Issues

September 9, 2019May 25, 2021 David Schor
Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55

Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55

February 10, 2020May 25, 2021 David Schor

Random Tags

2.5D packaging 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 AVX-512 chiplet Coffee Lake Core i5 Core i7 Core i9 edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY

TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY

January 17, 2020May 25, 2021 David Schor
Intel Labs Builds A Neuromorphic System With 64 To 768 Loihi Chips: 8 Million To 100 Million Neurons

Intel Labs Builds A Neuromorphic System With 64 To 768 Loihi Chips: 8 Million To 100 Million Neurons

July 15, 2019May 25, 2021 David Schor
A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor

A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor

November 10, 2019May 25, 2021 David Schor
Core i7-8086K Overclockability Silicon Lottery Stats

Core i7-8086K Overclockability Silicon Lottery Stats

June 17, 2018May 25, 2021 David Schor
Samsung Ramps 7nm, Preps 5nm, And Adds 6nm

Samsung Ramps 7nm, Preps 5nm, And Adds 6nm

April 16, 2019May 25, 2021 David Schor
Eni fires up its supercomputer, breaks into the TOP500’s top ten

Eni fires up its supercomputer, breaks into the TOP500’s top ten

January 19, 2018May 25, 2021 David Schor
Qualcomm launches the Centriq 2400 server family

Qualcomm launches the Centriq 2400 server family

November 8, 2017May 25, 2021 David Schor

ARM WorldView All

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor
A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip
IEDM 2020 Interconnects Packaging Subscriber Only Content 

A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip

June 11, 2021June 11, 2021 David Schor
Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700
Architectures Interconnects Network-on-Chip 

Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700

May 25, 2021May 25, 2021 David Schor
Arm Launches The DSU-110 For New Armv9 CPU Clusters
Architectures Interconnects Mobile Processors 

Arm Launches The DSU-110 For New Armv9 CPU Clusters

May 25, 2021May 25, 2021 David Schor

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