WikiChip Fuse
Inside Rosetta: The Engine Behind Cray’s Slingshot Exascale-Era Interconnect

A dive into the Rosetta ASIC switch, the engine behind Cray’s new Slingshot interconnect powering the upcoming Shasta exascale supercomputers.

Read more
Arm Makes Headway In HPC, Cloud

Arm makes headway in HPC and cloud with Cray’s new support for the Fujitsu A64FX and Microsoft deployment of Marvell’s ThunderX2 processors.

Read more
Intel axes Knights Hill, plans a new microarchitecture for exascale

In preparation for the United States’ first exascale supercomputer, Intel announces they are cancelling next-generation Xeon Phi processors (codename Knights Hill) in favor of a brand new platform and microarchitecture specifically designed for exascale.

Read more