Skip to content
Wednesday, September 27, 2023
Latest:
  • Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core
  • Arm Introduces A New Big Core, The Cortex-A720
  • Arm Launches Next-Gen Efficiency Core; Cortex-A520
  • TSMC N3, And Challenges Ahead
  • A Look At AMD’s 3D-Stacked V-Cache
WikiChip Fuse

WikiChip Fuse

Your Chips and Semi News

  • Home
  • Account
  • Main Site
  • Architectures
    • x86
    • ARM
    • RISC-V
    • Power ISA
    • MIPS
  • Supercomputers
  • 14 nm
  • 12nm
  • 10nm
  • 7nm
  • 5nm

Marvell

Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor 5 nm, ARM, ARMv9, Data Processing Unit (DPU), Marvell, Neoverse N2, Octeon

Marvell launches the OCTEON 10 DPU series. Fabricated on a 5 nm process, these chips integrate Neoverse N2 cores, AI acceleration, vector packet processing acceleration, a 1 terabit switch, and the latest DDR5 and PCIe 5.0 I/O interfaces

Read more
Server Processors 

Arm Makes Headway In HPC, Cloud

November 13, 2019May 25, 2021 David Schor ARM, Azure, Cray, exascale, Fujitsu, Marvell, Scalable Vector Extension (SVE), ThunderX, ThunderX2

Arm makes headway in HPC and cloud with Cray’s new support for the Fujitsu A64FX and Microsoft deployment of Marvell’s ThunderX2 processors.

Read more
Roadmaps Server Processors 

Marvell Lays Out ARM Server Roadmap

November 9, 2019May 25, 2021 David Schor 16nm, 7 nm, ARM, Linley Processor Conference, Marvell, Scalable Vector Extension (SVE), ThunderX, ThunderX2, ThunderX3, ThunderX4

Marvell outlines its current and future Arm server microprocessor roadmap, aiming at a 2-year cadence with greater than 2x performance gen-over-gen.

Read more
Supercomputers 

Cavium Takes ARM to Petascale with Astra

August 25, 2018May 25, 2021 David Schor ARM, ARMv8, Cavium, DoE, HPC, Marvell, Sandia, Supercomputers, ThunderX, ThunderX2, Vulcan

A look at the Astra supercomputer, the most powerful ARM-based supercomputer being built for Sandia National Labs.

Read more
Server Processors Supercomputers 

A Look at Cavium’s New High-Performance ARM Microprocessors and the Isambard Supercomputer

June 3, 2018May 25, 2021 David Schor 16nm, ARM, ARMv8, Cavium, HPC, Marvell, ThunderX, ThunderX2, Vulcan

Reaching general availability, here is a look at Cavium’s new ThunderX2 family of high-performance ARM microprocessors for the data center.

Read more

Top Six Articles

  • TSMC N3, And Challenges Ahead
  • A Look At Intel 4 Process Technology
  • Intel 2021 Process Technology Update: Intel 7, Intel 4, Intel 3, and Intel 20A
  • IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects
  • IEDM 2022: Did We Just Witness The Death Of SRAM?
  • VLSI 2018: Samsung’s 2nd Gen 7nm, EUV Goes HVM

Recent

  • Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core

    Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core

    May 28, 2023May 28, 2023 David Schor
  • Arm Introduces A New Big Core, The Cortex-A720

    Arm Introduces A New Big Core, The Cortex-A720

    May 28, 2023May 28, 2023 David Schor
  • Arm Launches Next-Gen Efficiency Core; Cortex-A520

    Arm Launches Next-Gen Efficiency Core; Cortex-A520

    May 28, 2023May 28, 2023 David Schor
  • TSMC N3, And Challenges Ahead

    TSMC N3, And Challenges Ahead

    May 27, 2023May 27, 2023 David Schor
  • A Look At AMD’s 3D-Stacked V-Cache

    A Look At AMD’s 3D-Stacked V-Cache

    December 27, 2022December 27, 2022 David Schor
  • IEDM 2022: Did We Just Witness The Death Of SRAM?

    IEDM 2022: Did We Just Witness The Death Of SRAM?

    December 14, 2022December 15, 2022 David Schor

Random Picks

AMD Announces Threadripper 2, Chiplets Aid Core Scaling

AMD Announces Threadripper 2, Chiplets Aid Core Scaling

August 7, 2018May 25, 2021 David Schor
Inside PFN’s AI Processor And The World’s Most Power-Efficient Supercomputer

Inside PFN’s AI Processor And The World’s Most Power-Efficient Supercomputer

September 20, 2021September 20, 2021 David Schor
Radeon RX 5700: Navi and the RDNA Architecture

Radeon RX 5700: Navi and the RDNA Architecture

February 23, 2020May 25, 2021 David Schor
AMD Discloses Initial Zen 2 Details

AMD Discloses Initial Zen 2 Details

November 18, 2018May 25, 2021 David Schor
Intel Looks to Advanced 3D Packaging For More-than-Moore to Supplement 10- and 7-Nanometer Nodes

Intel Looks to Advanced 3D Packaging For More-than-Moore to Supplement 10- and 7-Nanometer Nodes

December 22, 2018May 25, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel Intel 7 ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Samsung Details 5nm and 4nm; Adds 8LPA, 5LPP, and 4LPP Nodes; Readies 3nm GAA For Next Year

Samsung Details 5nm and 4nm; Adds 8LPA, 5LPP, and 4LPP Nodes; Readies 3nm GAA For Next Year

May 21, 2021June 24, 2021 David Schor
Intel Stratix 10 DX Adds PCIe Gen 4.0, Cache Coherency: UPI As Stopgap

Intel Stratix 10 DX Adds PCIe Gen 4.0, Cache Coherency: UPI As Stopgap

September 20, 2019May 25, 2021 David Schor
A Look at Cavium’s New High-Performance ARM Microprocessors and the Isambard Supercomputer

A Look at Cavium’s New High-Performance ARM Microprocessors and the Isambard Supercomputer

June 3, 2018May 25, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor
AMD Announces Threadripper 2, Chiplets Aid Core Scaling

AMD Announces Threadripper 2, Chiplets Aid Core Scaling

August 7, 2018May 25, 2021 David Schor
Intel Launches 10th Gen Ice Lake Lineup: 11 New Mobile Chips

Intel Launches 10th Gen Ice Lake Lineup: 11 New Mobile Chips

August 1, 2019May 25, 2021 David Schor
SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio

SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio

November 17, 2019May 25, 2021 David Schor

ARM WorldView All

Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core
Architectures Desktop Processors Mobile Processors Server Processors 

Arm Introduces The Cortex-X4, Its Newest Flagship Performance Core

May 28, 2023May 28, 2023 David Schor
Arm Introduces A New Big Core, The Cortex-A720
Architectures Desktop Processors Mobile Processors 

Arm Introduces A New Big Core, The Cortex-A720

May 28, 2023May 28, 2023 David Schor
Arm Launches Next-Gen Efficiency Core; Cortex-A520
Architectures Embedded Processors Mobile Processors 

Arm Launches Next-Gen Efficiency Core; Cortex-A520

May 28, 2023May 28, 2023 David Schor
Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor

About

WikiChip
WikiChip is an independent publisher based in New York. The WikiChip Fuse section publishes chips and semiconductor related news with our main site offering in-depth semiconductor resources and analysis.

WikiChip Links

  • Main Site
  • WikiChip Fuse
  • Newsletter
  • Main Site
  • WikiChip Fuse

Copyright © 2023 WikiChip LLC. All rights reserved.