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  • A Look At AMD’s 3D-Stacked V-Cache
  • IEDM 2022: Did We Just Witness The Death Of SRAM?
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores
  • Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications
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Marvell

Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor 5 nm, ARM, ARMv9, Data Processing Unit (DPU), Marvell, Neoverse N2, Octeon

Marvell launches the OCTEON 10 DPU series. Fabricated on a 5 nm process, these chips integrate Neoverse N2 cores, AI acceleration, vector packet processing acceleration, a 1 terabit switch, and the latest DDR5 and PCIe 5.0 I/O interfaces

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Server Processors 

Arm Makes Headway In HPC, Cloud

November 13, 2019May 25, 2021 David Schor ARM, Azure, Cray, exascale, Fujitsu, Marvell, Scalable Vector Extension (SVE), ThunderX, ThunderX2

Arm makes headway in HPC and cloud with Cray’s new support for the Fujitsu A64FX and Microsoft deployment of Marvell’s ThunderX2 processors.

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Roadmaps Server Processors 

Marvell Lays Out ARM Server Roadmap

November 9, 2019May 25, 2021 David Schor 16nm, 7 nm, ARM, Linley Processor Conference, Marvell, Scalable Vector Extension (SVE), ThunderX, ThunderX2, ThunderX3, ThunderX4

Marvell outlines its current and future Arm server microprocessor roadmap, aiming at a 2-year cadence with greater than 2x performance gen-over-gen.

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Supercomputers 

Cavium Takes ARM to Petascale with Astra

August 25, 2018May 25, 2021 David Schor ARM, ARMv8, Cavium, DoE, HPC, Marvell, Sandia, Supercomputers, ThunderX, ThunderX2, Vulcan

A look at the Astra supercomputer, the most powerful ARM-based supercomputer being built for Sandia National Labs.

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Server Processors Supercomputers 

A Look at Cavium’s New High-Performance ARM Microprocessors and the Isambard Supercomputer

June 3, 2018May 25, 2021 David Schor 16nm, ARM, ARMv8, Cavium, HPC, Marvell, ThunderX, ThunderX2, Vulcan

Reaching general availability, here is a look at Cavium’s new ThunderX2 family of high-performance ARM microprocessors for the data center.

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Top Six Articles

  • A Look At Intel 4 Process Technology
  • TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node
  • Arm Introduces The Cortex-A715
  • Arm Introduces Its Confidential Compute Architecture
  • Intel Reveals 10nm Sunny Cove Core, a New Core Roadmap, and Teases Ice Lake Chips
  • N3E Replaces N3; Comes In Many Flavors

Recent

  • A Look At AMD’s 3D-Stacked V-Cache

    A Look At AMD’s 3D-Stacked V-Cache

    December 27, 2022December 27, 2022 David Schor
  • IEDM 2022: Did We Just Witness The Death Of SRAM?

    IEDM 2022: Did We Just Witness The Death Of SRAM?

    December 14, 2022December 15, 2022 David Schor
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    November 1, 2022November 2, 2022 David Schor
  • Intel, SiFive Demo High-Performance  RISC-V Horse Creek Dev Platform On Intel 4 Process

    Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process

    October 7, 2022October 7, 2022 David Schor
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    October 4, 2022October 4, 2022 David Schor
  • Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    October 1, 2022October 3, 2022 David Schor

Random Picks

Hot Chips 30: Nvidia Xavier SoC

Hot Chips 30: Nvidia Xavier SoC

September 8, 2018May 25, 2021 David Schor
AMD Launches Ryzen PRO 3000 Series

AMD Launches Ryzen PRO 3000 Series

October 3, 2019May 25, 2021 David Schor
Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
The NPU Inside Every Intel PC

The NPU Inside Every Intel PC

September 30, 2022September 30, 2022 David Schor
Intel’s Total Memory Encryption, a new x86 extension for full memory encryption

Intel’s Total Memory Encryption, a new x86 extension for full memory encryption

December 17, 2017May 25, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel Intel 7 ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Intel Stratix 10 DX Adds PCIe Gen 4.0, Cache Coherency: UPI As Stopgap

Intel Stratix 10 DX Adds PCIe Gen 4.0, Cache Coherency: UPI As Stopgap

September 20, 2019May 25, 2021 David Schor
TOP500 50th List Anniversary: A Visualized Breakdown

TOP500 50th List Anniversary: A Visualized Breakdown

November 14, 2017May 25, 2021 David Schor
BrainChip Discloses Akida, A Neuromorphic SoC

BrainChip Discloses Akida, A Neuromorphic SoC

September 28, 2018May 25, 2021 David Schor
Intel to leverage EMIBs to create mobile processors with discrete AMD graphics

Intel to leverage EMIBs to create mobile processors with discrete AMD graphics

November 7, 2017May 25, 2021 David Schor
7nm Boosted Zen 2 Capabilities but Doubled the Challenges

7nm Boosted Zen 2 Capabilities but Doubled the Challenges

February 21, 2020May 25, 2021 David Schor
TSMC 2021 Foundry Update: Foundry Roadmap

TSMC 2021 Foundry Update: Foundry Roadmap

July 6, 2021July 6, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor

ARM WorldView All

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor
Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor

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