A Look at Intel Lakefield: A 3D-Stacked Single-ISA Heterogeneous Penta-Core SoC
ArchitecturesHot Chips 31IEDM 2019ISSCC 2020 April 5, 2020 1
A look at Lakefield, Intel’s new mobile-class heterogeneous penta-core SoC built using two dies 3D-stacked face-to-face using the company Foveros packaging technology.
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TSMC Details 5 nm
FoundriesIEDM 2019ISSCC 2020Process Technologies March 21, 2020 3
TSMC details its 5-nanometer node for mobile and HPC applications. The process features the industry’s highest density transistors with a high-mobility channel and highest-density SRAM cells.
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TSMC Digs Trenches In Search Of Higher Performance
IEDM 2019InterconnectsPackagingProcess Technologies December 14, 2019 0
TSMC leverages existing silicon in the CoWoS process to improve the power delivery system of high-performance applications through new, deep trench capacitors, codename iCAPs.
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Intel 2020s Process Technology Roadmap: 10nm+++, 3nm, 2nm, and 1.4nm for 2029
IEDM 2019Process TechnologiesRoadmaps December 10, 2019 1
Intel’s process technology roadmap reveals decade-out plans, including a future 10nm+++ node and even a 1.4nm node heading into 2029.
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