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Sunday, March 7, 2021
Latest:
  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
  • Arm’s New Cortex-M55 Breathes Helium
  • Intel Launches Lakefield: An Experiment With Multiple New Technologies
  • Arm Unveils the Cortex-A78: When Less Is More
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N7

Foundries Process Technologies Roadmaps 

TSMC Ramps 5nm, Discloses 3nm to Pack Over a Quarter-Billion Transistors Per Square Millimeter

April 17, 2020 David Schor 6 Comments 3 nm, 5 nm, FinFET, N3, N5, N5P, N7, N7P, TSMC

TSMC reports a flat Q1 amid the COVID-19 pandemic, ramps its 5nm node with good yield and discloses key 3-nanometer (N3) details. N3 will be a full node jump over N5 and is expected to offer over a quarter-billion transistors per each millimeter square of silicon.

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Foundries 

TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY

January 17, 2020 David Schor 0 Comments 3nm, 5nm, 7nm, N3, N5, N6, N7, TSMC

7-nanometer contributes the lion’s share of wafer revenue to TSMC’s fourth-quarter driven by growth from smartphones and HPC. The foundry is also preparing the 5-nanometer node for early this year and the 6-nanometer by the end of the year.

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ARM TechCon 2019 Foundries Process Technologies 

TSMC 5-Nanometer Update

November 1, 2019 David Schor 0 Comments 5nm, 6nm, 7nm, EUV, N5, N6, N7, TSMC

An update on TSMC’s upcoming 5-nanometer process technology.

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Process Technologies 

TSMC N7+ EUV Process Starts Shipping

October 7, 2019 David Schor 1 Comment 7nm, EUV, N6, N7, TSMC

TSMC announces its N7+ process which entered HVM earlier this year is now shipping products to market.

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Packaging Process Technologies SEMICON West 2019 VLSI 2019 

TSMC Talks 7nm, 5nm, Yield, And Next-Gen 5G And HPC Packaging

July 28, 2019 David Schor 3 Comments 3D packaging, 3nm, 5nm, 6nm, 7nm, CoWoS, InFO, InFO_AiP, InFO_MS, InFO_oS, N5, N5P, N6, N7, N7P, SemiConWest, SoIC, TSMC, VLSI 2019, VLSI Symposium

An update on TSMC current and forthcoming logic process nodes as well as their next-generation advanced packaging technologies.

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Top Six Articles

  • Intel Launches Lakefield: An Experiment With Multiple New Technologies
  • TSMC Digs Trenches In Search Of Higher Performance
  • Inside Rosetta: The Engine Behind Cray’s Slingshot Exascale-Era Interconnect
  • Intel Unveils the Tremont Microarchitecture: Going After ST Performance
  • TSMC Details 5 nm
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

Recent

  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10
  • Arm’s New Cortex-M55 Breathes Helium

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
  • Intel Launches Lakefield: An Experiment With Multiple New Technologies

    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    June 15, 2020 David Schor 3
  • Arm Unveils the Cortex-A78: When Less Is More

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0
  • Arm Cortex-X1: The First From The Cortex-X Custom Program

    Arm Cortex-X1: The First From The Cortex-X Custom Program

    May 26, 2020 David Schor 0
  • Comment
  • Recent
  • Sanne Deijkers says:

    Hi, very nice article which really give insight in...

  • Solendore says:

    Intel 7nm (237 MTr/mm^2) will be competitive with...

  • Steffen Eilers says:

    Yes....

  • Steffen says:

    Really exited for the time when ARM tries to serio...

  • Piotr says:

    Depends on what you're comparing. N6 manufacturing...

  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10
    Arm’s New Cortex-M55 Breathes Helium

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    June 15, 2020 David Schor 3
    Arm Unveils the Cortex-A78: When Less Is More

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0

    Random Picks

    Marvell Lays Out ARM Server Roadmap

    Marvell Lays Out ARM Server Roadmap

    November 9, 2019 David Schor 0
    Inside Tesla’s Neural Processor In The FSD Chip

    Inside Tesla’s Neural Processor In The FSD Chip

    September 22, 2019 David Schor 0
    Core i7-8700K overclockability silicon lottery stats

    Core i7-8700K overclockability silicon lottery stats

    November 12, 2017 David Schor 6
    TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO

    TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO

    June 16, 2019 David Schor 6
    Apple’s iMac Pro Xeon W are ready

    Apple’s iMac Pro Xeon W are ready

    December 24, 2017 David Schor 0

    Random Tags

    2.5D packaging 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 12nm 14 nm 16nm AI AMD ARM ARMv8 chiplet Coffee Lake Core i5 Core i7 edge computing EMIB EUV FinFET Foveros FPGA GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen Zen 2

    x86 WorldView All

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
    Architectures 

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10

    Intel publishes details of its upcoming Advanced Matrix Extension (AMX), an x86 extension set to debut with Sapphire Rapids that introduces a new matrix register file and accompanying matrix operations.

    Centaur New x86 Server Processor Packs an AI Punch
    Architectures Neural Processors Server Processors 

    Centaur New x86 Server Processor Packs an AI Punch

    January 24, 2020 David Schor 3
    Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs
    Desktop Processors Mobile Processors Roadmaps Server Processors 

    Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs

    December 12, 2019 David Schor 0
    Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512
    Architectures Embedded Processors Neural Processors Server Processors 

    Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512

    December 9, 2019 David Schor 3
    SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio
    Architectures Roadmaps Server Processors Supercomputers Supercomputing 19 

    SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio

    November 17, 2019 David Schor 1
    AMD Announces 3rd Gen Ryzen Threadripper
    Desktop Processors Server Processors 

    AMD Announces 3rd Gen Ryzen Threadripper

    November 8, 2019 David Schor 0

    Random

    Intel launches the Xeon D-2100 series of low-power edge processors

    Intel launches the Xeon D-2100 series of low-power edge processors

    February 7, 2018 David Schor 0
    OCP Makes a Push for an Open Chiplet Marketplace

    OCP Makes a Push for an Open Chiplet Marketplace

    January 4, 2020 David Schor 0
    Nantero’s NRAM, A Universal Memory Candidate?

    Nantero’s NRAM, A Universal Memory Candidate?

    September 22, 2018 David Schor 2
    A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip

    A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip

    November 16, 2019 David Schor 0
    Intel Starts Shipping Initial Nervana NNP Lineup

    Intel Starts Shipping Initial Nervana NNP Lineup

    December 6, 2019 David Schor 1
    AMD Launches New Entry-Level Mobile ‘Dali’ Processors

    AMD Launches New Entry-Level Mobile ‘Dali’ Processors

    January 9, 2020 David Schor 0
    Intel Launches Stratix 10 GX 10M; 10M LEs, Two Massive Interconnected Dies

    Intel Launches Stratix 10 GX 10M; 10M LEs, Two Massive Interconnected Dies

    November 7, 2019 David Schor 0

    ARM WorldView All

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support
    Roadmaps Server Processors 

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    Arm’s New Cortex-M55 Breathes Helium
    Architectures Embedded Processors 

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
    Arm Unveils the Cortex-A78: When Less Is More
    Architectures Mobile Processors 

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0
    Arm Cortex-X1: The First From The Cortex-X Custom Program
    Architectures Mobile Processors 

    Arm Cortex-X1: The First From The Cortex-X Custom Program

    May 26, 2020 David Schor 0
    Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55
    Architectures Neural Processors 

    Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55

    February 10, 2020 David Schor 0
    Arm Ethos is for Ubiquitous AI At the Edge
    Architectures Linley Processor Conference Neural Processors 

    Arm Ethos is for Ubiquitous AI At the Edge

    February 6, 2020 David Schor 0

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