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  • A Look At AMD’s 3D-Stacked V-Cache
  • IEDM 2022: Did We Just Witness The Death Of SRAM?
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores
  • Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications
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3nm

Foundries 

TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY

January 17, 2020May 25, 2021 David Schor 3nm, 5nm, 7nm, N3, N5, N6, N7, TSMC

7-nanometer contributes the lion’s share of wafer revenue to TSMC’s fourth-quarter driven by growth from smartphones and HPC. The foundry is also preparing the 5-nanometer node for early this year and the 6-nanometer by the end of the year.

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Packaging Process Technologies SEMICON West 2019 VLSI 2019 

TSMC Talks 7nm, 5nm, Yield, And Next-Gen 5G And HPC Packaging

July 28, 2019May 25, 2021 David Schor 3D packaging, 3nm, 5nm, 6nm, 7nm, CoWoS, InFO, InFO_AiP, InFO_MS, InFO_oS, N5, N5P, N6, N7, N7P, SemiConWest, SoIC, TSMC, VLSI 2019, VLSI Symposium

An update on TSMC current and forthcoming logic process nodes as well as their next-generation advanced packaging technologies.

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SEMICON West 2019 

SEMICON West 2019: ASML EUV Update

July 21, 2019May 25, 2021 David Schor 3nm, 5nm, 7nm, ASML, EUV, High-NA, NXE:3100, NXE:3300B, NXE:3400B

An update on the current state of EUV systems which was given by ASML at SEMICON West 2019 earlier this month.

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ARM TechCon 2018 Foundries Packaging Process Technologies 

Samsung 7nm Enters Risk Production, Talks Roadmap, Scaling Boosters, and the ARM Ecosystem

October 28, 2018May 25, 2021 David Schor 2.5D packaging, 3D packaging, 3GAAE, 3GAAP, 3GAE, 3nm, 4LPE, 4LPP, 5LPE, 5nm, 7LPP, 7nm, EUV, Packaging, Samsung

Samsung gives an update on their 7nm EUV-based process, details the foundry technology roadmap down to 3nm and the ARM ecosystem that follows.

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Top Six Articles

  • A Look At Intel 4 Process Technology
  • A Look At AMD’s 3D-Stacked V-Cache
  • Intel 2021 Process Technology Update: Intel 7, Intel 4, Intel 3, and Intel 20A
  • Intel Unveils Foveros Omni And Foveros Direct; Leveraging Hybrid Bonding
  • Inside Rosetta: The Engine Behind Cray’s Slingshot Exascale-Era Interconnect
  • Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process

Recent

  • A Look At AMD’s 3D-Stacked V-Cache

    A Look At AMD’s 3D-Stacked V-Cache

    December 27, 2022December 27, 2022 David Schor
  • IEDM 2022: Did We Just Witness The Death Of SRAM?

    IEDM 2022: Did We Just Witness The Death Of SRAM?

    December 14, 2022December 15, 2022 David Schor
  • SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    SiFive Announces New Cores, BiFurcates Line Into Performance And Efficiency Cores

    November 1, 2022November 2, 2022 David Schor
  • Intel, SiFive Demo High-Performance  RISC-V Horse Creek Dev Platform On Intel 4 Process

    Intel, SiFive Demo High-Performance RISC-V Horse Creek Dev Platform On Intel 4 Process

    October 7, 2022October 7, 2022 David Schor
  • TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    TSMC Demos SoIC_H for High-Bandwidth HPC Applications

    October 4, 2022October 4, 2022 David Schor
  • Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    Intel Rolls Out 13th Gen Core, Raptor Lake Processors; Cranks Up The Frequency

    October 1, 2022October 3, 2022 David Schor

Random Picks

Ice Lake Brings A New CPU, GPU, IPU, and I/Os, To Follow By Tiger Lake Next Year

Ice Lake Brings A New CPU, GPU, IPU, and I/Os, To Follow By Tiger Lake Next Year

May 12, 2019May 25, 2021 David Schor
Intel Expands 22FFL With Production-Ready RRAM and MRAM on FinFET

Intel Expands 22FFL With Production-Ready RRAM and MRAM on FinFET

October 18, 2019May 25, 2021 David Schor
Intel Introduces 10nm Agilex FPGAs; Customized Connectivity with HBM, DDR5, PCIe Gen 5, and  112G Transceivers

Intel Introduces 10nm Agilex FPGAs; Customized Connectivity with HBM, DDR5, PCIe Gen 5, and 112G Transceivers

April 2, 2019May 25, 2021 David Schor
A Look At The ET-SoC-1, Esperanto’s Massively Multi-Core RISC-V Approach To AI

A Look At The ET-SoC-1, Esperanto’s Massively Multi-Core RISC-V Approach To AI

July 10, 2021August 2, 2021 David Schor
A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip

A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip

June 11, 2021June 11, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel Intel 7 ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Arm Unveils Next-Gen Flagship Core: Cortex-X3

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
The RISC-V momentum continues with the GAP8, a new IoT/AI Application Processor

The RISC-V momentum continues with the GAP8, a new IoT/AI Application Processor

February 28, 2018May 25, 2021 David Schor
Inside PFN’s AI Processor And The World’s Most Power-Efficient Supercomputer

Inside PFN’s AI Processor And The World’s Most Power-Efficient Supercomputer

September 20, 2021September 20, 2021 David Schor
Ice Lake Brings A New CPU, GPU, IPU, and I/Os, To Follow By Tiger Lake Next Year

Ice Lake Brings A New CPU, GPU, IPU, and I/Os, To Follow By Tiger Lake Next Year

May 12, 2019May 25, 2021 David Schor
Centaur New x86 Server Processor Packs an AI Punch

Centaur New x86 Server Processor Packs an AI Punch

January 24, 2020May 25, 2021 David Schor
A Look at Intel Lakefield: A 3D-Stacked Single-ISA Heterogeneous Penta-Core SoC

A Look at Intel Lakefield: A 3D-Stacked Single-ISA Heterogeneous Penta-Core SoC

April 5, 2020May 25, 2021 David Schor
Intel Launches 10th Gen Ice Lake Lineup: 11 New Mobile Chips

Intel Launches 10th Gen Ice Lake Lineup: 11 New Mobile Chips

August 1, 2019May 25, 2021 David Schor

ARM WorldView All

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor
Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor

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