N6 – WikiChip Fuse

Foundries Process Technologies Roadmaps Subscriber Only Content

TSMC 2021 Foundry Update: Foundry Roadmap

July 6, 2021July 6, 2021 David Schor 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, Extreme Ultraviolet (EUV) Lithography, FinFET, N2 2 nm, N3, N4, N5, N6, N7, subscriber only (general), TSMC

TSMC 2021 foundry update

TSMC Q4: 7nm Dominates Revenue, Preps 5nm Ramp, 6nm By EOY

January 17, 2020May 25, 2021 David Schor 3nm, 5nm, 7nm, N3, N5, N6, N7, TSMC

7-nanometer contributes the lion’s share of wafer revenue to TSMC’s fourth-quarter driven by growth from smartphones and HPC. The foundry is also preparing the 5-nanometer node for early this year and the 6-nanometer by the end of the year.

ARM TechCon 2019 Foundries Process Technologies

TSMC 5-Nanometer Update

November 1, 2019May 25, 2021 David Schor 5nm, 6nm, 7nm, EUV, N5, N6, N7, TSMC

An update on TSMC’s upcoming 5-nanometer process technology.

Process Technologies

TSMC N7+ EUV Process Starts Shipping

October 7, 2019May 25, 2021 David Schor 7nm, EUV, N6, N7, TSMC

TSMC announces its N7+ process which entered HVM earlier this year is now shipping products to market.

Packaging Process Technologies SEMICON West 2019 VLSI 2019

TSMC Talks 7nm, 5nm, Yield, And Next-Gen 5G And HPC Packaging

July 28, 2019May 25, 2021 David Schor 3D packaging, 3nm, 5nm, 6nm, 7nm, CoWoS, InFO, InFO_AiP, InFO_MS, InFO_oS, N5, N5P, N6, N7, N7P, SemiConWest, SoIC, TSMC, VLSI 2019, VLSI Symposium

An update on TSMC current and forthcoming logic process nodes as well as their next-generation advanced packaging technologies.