Intel to launch Skylake-D in Q1 2018, followed by Xeons with integrated FPGA
Server Processors November 26, 2017 David Schor 0

Over the last week, Intel has given out series of slides to publishers which compares Skylake-SP to Naples. Embedded in those slides we found a number of other interesting confirmations.
Skylake-based Xeon-D
The key slide is shown with the bullet highlighted.

Future updates from the Intel’s slide deck
We now have confirmation that Skylake-D is coming in “early 2018” which we are interpreting as first quarter (likely January-February timeframe). Those parts are particularly interesting because they fill the gap between the Atom server parts (Denverton) and the high-performance Xeons (Skylake-SP).
Prior Xeon-D parts were based on Broadwell (Broadwell-DE) which incorporated anywhere from 4 to 16 cores at low TDPs (35 W to 65 W). We expect to see similar TDPs from the upcoming Skylake-based SKUs. Currently those Broadwell models go up to 16 cores. Higher core-count parts should come with this release; at least up to 18 cores which would be the Skylake high core count (HCC) die.
Higher core-count Xeon-D parts based on Skylake should better position Intel against the Centriq family of ARM server processors which were recently launched by Qualcomm.
Xeon with Integrated FPGA
The same slide made a passing mention that we can expect to Xeon Scalable processors with integrated FPGAs after the Xeon D release. It’s worth noting that no tentative date was given meaning it could be late 2018 or even 2019. We do believe the initial release will happen in 2018.
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- ISSCC 2018: Intel’s Skylake-SP Mesh and Floorplan
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- Intel Launches Stratix 10 GX 10M; 10M LEs, Two Massive Interconnected Dies
- Intel Core i9-9900KS Special Edition Full Specs and Availability Announced
- Intel Spring Hill: Morphing Ice Lake SoC Into A Power-Efficient Data Center Inference Accelerator
- NEC Refreshes SX-Aurora Vector Engine, Outlines Roadmap
- Japanese AI Startup Preferred Networks Designed A Custom Half-petaFLOPS Training Chip
- Samsung M5 Core Details Show Up
- SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio
- A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip
- Groq Tensor Streaming Processor Delivers 1 PetaOPS of Compute
- Arm Makes Headway In HPC, Cloud
- Intel Announces Keem Bay: 3rd Generation Movidius VPU
- A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor
- Marvell Lays Out ARM Server Roadmap
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