Arm Targets Data Centers with New Roadmaps, Architectures, and Standards

Fifth Wave of Computing & 1 Trillion Connected Devices

Back at Arm TechCon 2018, Simon Segars, Arm’s CEO opened his keynote with what he considers to be the future of the semiconductor industry. He called it the 5th wave of computing. The first wave was the era of the mainframes. Wave 2 was personal computing and wave 3 was the Internet. Currently, we are in the fourth wave – mobile and the cloud. This brings us to the fifth wave of computing. It’s a little hard to define. Segars considers it the confluence of all the previous technologies. “It’s an era of computing that is going to be data-driven. It’s where the kind of traditional algorithmic computing gives way to where data is flowing through machines and decisions are being made based on what the data is telling us,” Segars said.

Simon Segars Keynote at ARM Techcon 2018 (WikiChip)

Segars believes the fifth wave will create an enormous opportunity not only for Arm but also for entrepreneurs and other companies who seize the opportunity to leverage the technology. “The amount of compute power in a device is important, but it isn’t the only critical thing anymore. We shouldn’t be measuring the devices on how many gigaFLOPS, megahertz, or tera-whatever the individual device has. It is about the collective compute power of the system,” Segars added. He suggested that we have to rethink how systems work. What gets done where (edge, vs network, vs data center). “We are thinking about the system. How that works end-to-end because that’s going to be the computer of the future. It’s not on your desk or in your pocket. It is everywhere and it is the combined compute power that is the fifth wave.” A big component of the fife wave of computing for Arm is 5G. Arm believes that when the full 5G roll-out is complete, it will enable a trillion connected devices. “Our estimate is that there will be a trillion connected things by 2035,” Segars noted. One of the key takeaways from Segars idea of the fifth wave of computing is that in order to support a trillion connected devices by 2035, the ecosystem and infrastructure must come together now – seventeen years in advance.

Arm Neoverse

Segars fifth wave of computing keynote sets the stage for why the company is introducing the Neoverse and everything else that comes with it.

“I want to make it very clear that when it comes to the data center, Arm is all-in in terms of the technologies that we are creating and the partnership we are building to enable efficient and low-cost data centers.” – Simon Segars

Arm sees a big opporunity. To address the growing demand of the infrastructure in preparation for what Arm considers the fifth wave of computing, they announced the Arm Neoverse. The Neoverse was announced by Drew Henry in his keynote. Henry is Arm’s SVP and GM of Infrastructure Business Unit. He opened up his keynote by discussing the scale of the Arm ecosystem and its impact on the semiconductor industry.

The Arm Neoverse is a new brand that covers the entire infrastructure from the cloud to the edge. You can think of the Neoverse as being orthogonal to the Cortex brand. Essentially, it’s everything that is non-client, unlike your smartphone. The scope of what can be called ‘Neoverse’ isn’t as strictly defined as the Cortex brand. For example, unlike the Cortex brand, the Neoverse can be used by Arm partners that use Neoverse-based servers (e.g., cloud solutions), OEMs, and even companies with custom Arm microarchitectures such as Ampere, Cavium, and Qualcomm. Even IPs and software seems to fall under that brand. Effectively, the Neoverse seems to cover anything Arm-infrastructure related.

At Supercompting 18, Gigabyte had both Qualcomm’s Centriq and Cavium’s ThunderX2 boards on display. Although it is thought that Qualcomm’s server chips are officially dead, Gigabyte says they will have boards shipping by the middle of next year. Huaxintong Semiconductor, a JV between Qualcomm and The People’s Government of Guizhou is also launching custom chips based on Qualcomm’s design with the StarDragon 4800 family which has entered mass production earlier this month.

Scalability

The Neoverse is quite broad – intended to scale from the hyperscalers all the way to the edge. The goal is to provide enough flexibility to scale from various edge applications to very large cloud data centers. Drew Henry says “we’ll have very large cloud data centers, using 128-, 256-core designs with large caching systems and advanced memory hierarchies all the way out to edge devices which are much more focused on power-efficient designs with less cores and a smaller configuration to fit in the needs of the edge compute.” In one of his slides shown below, you can see a mention of eight DDR channels, eight HBM stacks, PCIe, CCIX, and 100 GbE support among the technologies they intend on supporting in collaboration with Arm partners.

Roadmap

With the introduction of the Neoverse, Arm is extending their roadmap to infrastructure with dedicated products.

Three new platforms were announced – Ares, Zeus, and Poseidon.

Drew Henry says we can expect Arm’s own cores to deliver 30% performance or higher generation over generation. We asked Arm for some clarification regarding this 30%. Those performance figures refer to platform-level improvements so they can come from many smaller contributors such as a new process node, microarchitectural changes, improvements in the memory subsystem, and memory technologies. By the way, they believe those figures are on the conservative side with actual system-level improvements being higher. Drew Henry also mentioned their Neoverse architecture partners – “architecture partners are partners that combine together implementations that they decide to do for markets that they think are the right markets to go after and address. They take the architectures we provide and do their own implementations for what they think is the right product for the market,” Henry said. The popular examples are Cavium and Ampere but there are a number of other designs such as Fujitsu with their A64FX chip which is specifically designed for the HPC market.

The current Arm server roadmap for some of the more popular companies looks something like this.

Popular Arm Server Roadmaps (WikiChip)

Cosmos

You might be wondering what is this “Cosmos” platform. We asked Arm about this. Turns out this isn’t actually a codename at all. It’s simply a term they coined to group pretty much everything that was used for infrastructure prior to the new Neoverse cores. In other words, Cosmos includes any existing infrastructure solution that’s currently shipping based on the Cortex-A72, A75, and alike.

Current solutions incorporate 16, 24, and 32 cores. There are plenty of those products on the market such as the Socionext SC2A11 with 24 Cortex-A53s and the HiSilicon Hi1616 with 32 Cortex-A72s.

One of the more interesting parts about the Cosmos platform which caught many by surprise is just how successful the platform already is. According to Drew Henry, “Arm is the number one processor technology used in the global internet infrastructure today”. This includes things such as routers, top-of-rack switching, and servers. 27% of all units shipped are shipping around Arm. Over one million Arm processors in that segment.

Recently, the Cosmos platform made it to the public cloud infrastructure. At the AWS re:Invent 2018, Amazon announced their own 64-bit 16-core Arm chip, the AWS Graviton. The chip features 16 Cortex-A72 cores and is designed by Annapurna Labs, a startup Amazon acquired in early 2015. Those chips have already been deployed by Amazon and may be accessed via Amazon EC2 A1 instances. The company says that for some workloads, the A1 instances may be as much as 40% cheaper over the x86 instances. WikiChip’s own experience with the A1 instances has been largely positive. Although the machines are a bit weak on raw performance, installing Linux and all the usual software stack (e.g., nginx, PHP, etc.) “just works”. For many types of workloads, even the current A1 instances should do well.

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Can you clarify or elaborate on “conflicting information” regarding the cores in the Hisilicon/Huawei product?