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Latest:
  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
  • Arm’s New Cortex-M55 Breathes Helium
  • Intel Launches Lakefield: An Experiment With Multiple New Technologies
  • Arm Unveils the Cortex-A78: When Less Is More
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SiFive

Architectures Embedded Processors Mobile Processors 

SiFive Launches 7 Series, Their Highest Performance RISC-V Cores

November 8, 2018 David Schor 0 Comments RISC-V, SiFive

SiFive launches 7 Series, their highest-performance RISC-V cores.

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Top Six Articles

  • TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO
  • IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects
  • TSMC Details 5 nm
  • TSMC Ramps 5nm, Discloses 3nm to Pack Over a Quarter-Billion Transistors Per Square Millimeter
  • ISSCC 2018: AMD’s Zeppelin; Multi-chip routing and packaging
  • VLSI 2018: Samsung’s 2nd Gen 7nm, EUV Goes HVM

Recent

  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10
  • Arm’s New Cortex-M55 Breathes Helium

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
  • Intel Launches Lakefield: An Experiment With Multiple New Technologies

    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    June 15, 2020 David Schor 3
  • Arm Unveils the Cortex-A78: When Less Is More

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0
  • Arm Cortex-X1: The First From The Cortex-X Custom Program

    Arm Cortex-X1: The First From The Cortex-X Custom Program

    May 26, 2020 David Schor 0
  • Comment
  • Recent
  • Steffen Eilers says:

    Yes....

  • Steffen says:

    Really exited for the time when ARM tries to serio...

  • Piotr says:

    Depends on what you're comparing. N6 manufacturing...

  • espinozahg says:

    Hey, everybody talks about GPU FLOPS but nobody ab...

  • Filipe says:

    O bom é q a arm tá longe de alcançar esse pata...

  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10
    Arm’s New Cortex-M55 Breathes Helium

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    June 15, 2020 David Schor 3
    Arm Unveils the Cortex-A78: When Less Is More

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0

    Random Picks

    Intel Introduces 10nm Agilex FPGAs; Customized Connectivity with HBM, DDR5, PCIe Gen 5, and  112G Transceivers

    Intel Introduces 10nm Agilex FPGAs; Customized Connectivity with HBM, DDR5, PCIe Gen 5, and 112G Transceivers

    April 2, 2019 David Schor 0
    MediaTek Announces The Helio P22, A New Premium Mid-Range SoC

    MediaTek Announces The Helio P22, A New Premium Mid-Range SoC

    May 25, 2018 Matt Larson 0
    Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512

    Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512

    December 9, 2019 David Schor 3

    IBM Open Sources Power ISA, Delays POWER10 to 2021

    September 12, 2019 David Schor 0
    TSMC Ramps 5nm, Discloses 3nm to Pack Over a Quarter-Billion Transistors Per Square Millimeter

    TSMC Ramps 5nm, Discloses 3nm to Pack Over a Quarter-Billion Transistors Per Square Millimeter

    April 17, 2020 David Schor 5

    Random Tags

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    x86 WorldView All

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
    Architectures 

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10

    Intel publishes details of its upcoming Advanced Matrix Extension (AMX), an x86 extension set to debut with Sapphire Rapids that introduces a new matrix register file and accompanying matrix operations.

    Centaur New x86 Server Processor Packs an AI Punch
    Architectures Neural Processors Server Processors 

    Centaur New x86 Server Processor Packs an AI Punch

    January 24, 2020 David Schor 3
    Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs
    Desktop Processors Mobile Processors Roadmaps Server Processors 

    Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs

    December 12, 2019 David Schor 0
    Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512
    Architectures Embedded Processors Neural Processors Server Processors 

    Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512

    December 9, 2019 David Schor 3
    SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio
    Architectures Roadmaps Server Processors Supercomputers Supercomputing 19 

    SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio

    November 17, 2019 David Schor 1
    AMD Announces 3rd Gen Ryzen Threadripper
    Desktop Processors Server Processors 

    AMD Announces 3rd Gen Ryzen Threadripper

    November 8, 2019 David Schor 0

    Random

    TSMC To Build A 5-Nanometer Fab In Arizona; Invest $12B Over The Next 8 Years

    TSMC To Build A 5-Nanometer Fab In Arizona; Invest $12B Over The Next 8 Years

    May 14, 2020 David Schor 0
    AMD’s Zen CPU Complex, Cache, and SMU

    AMD’s Zen CPU Complex, Cache, and SMU

    April 18, 2018 David Schor 0
    Intel silently launches Knights Mill

    Intel silently launches Knights Mill

    December 18, 2017 David Schor 0
    A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip

    A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip

    November 16, 2019 David Schor 0
    A Look at Cavium’s New High-Performance ARM Microprocessors and the Isambard Supercomputer

    A Look at Cavium’s New High-Performance ARM Microprocessors and the Isambard Supercomputer

    June 3, 2018 David Schor 0
    Samsung 5 nm and 4 nm Update

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    October 19, 2019 David Schor 3
    Inside Tesla’s Neural Processor In The FSD Chip

    Inside Tesla’s Neural Processor In The FSD Chip

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    ARM WorldView All

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support
    Roadmaps Server Processors 

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    Arm’s New Cortex-M55 Breathes Helium
    Architectures Embedded Processors 

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
    Arm Unveils the Cortex-A78: When Less Is More
    Architectures Mobile Processors 

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0
    Arm Cortex-X1: The First From The Cortex-X Custom Program
    Architectures Mobile Processors 

    Arm Cortex-X1: The First From The Cortex-X Custom Program

    May 26, 2020 David Schor 0
    Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55
    Architectures Neural Processors 

    Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55

    February 10, 2020 David Schor 0
    Arm Ethos is for Ubiquitous AI At the Edge
    Architectures Linley Processor Conference Neural Processors 

    Arm Ethos is for Ubiquitous AI At the Edge

    February 6, 2020 David Schor 0

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