AMD’s Zen CPU Complex, Cache, and SMU David SchorArchitectures, Circuit Design, ISSCC 2018April 18, 2018 Tagged 14LPP, 14nm, AMD, cache, floorplan, ISSCC, ISSCC 2017, ISSCC 2018, SRAM, x86, Zen A look at AMD’s Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores that are incorporated into a full SoC to form complete products such as their Zeppelin die. Pages: 1 2 Read more
