floorplan

IEDM 2018: Intel’s 10nm Standard Cell Library and Power Delivery

Circuit Design Floorplanning IEDM 2018 Process Technologies January 6, 2019 3

Presented at the 64th IEEE International Electron Devices Meeting (IEDM) in December, here’s a look at Intel’s 10-nanometer standard cell library and power delivery system.

ISSCC 2018: The IBM z14 Microprocessor And System Control Design

Architectures Circuit Design Floorplanning ISSCC 2018 Server Processors May 13, 2018 5

A look at the changes and enhancements that were implemented by IBM in their z14 mainframe microprocessor and system control chips.

AMD’s Zen CPU Complex, Cache, and SMU

Architectures Circuit Design ISSCC 2018 April 18, 2018 0

A look at AMD’s Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores that are incorporated into a full SoC to form complete products such as their Zeppelin die.

ISSCC 2018: Intel’s Skylake-SP Mesh and Floorplan

Architectures Circuit Design Floorplanning ISSCC 2018 March 9, 2018 0

At ISSCC 2018 Intel gave us some more interesting architectural details of their latest Skylake server microprocessors which brought a new mesh interconnect, a new cache hierarchy, and wider vector operations among a large array of other enhancements.