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Tuesday, January 19, 2021
Latest:
  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
  • Arm’s New Cortex-M55 Breathes Helium
  • Intel Launches Lakefield: An Experiment With Multiple New Technologies
  • Arm Unveils the Cortex-A78: When Less Is More
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floorplan

Circuit Design Floorplanning IEDM 2018 Process Technologies 

IEDM 2018: Intel’s 10nm Standard Cell Library and Power Delivery

January 6, 2019 David Schor 3 Comments 10nm, DTCO, floorplan, IEDM, IEDM 2018, place and route, power delivery, routing, standard cell

Presented at the 64th IEEE International Electron Devices Meeting (IEDM) in December, here’s a look at Intel’s 10-nanometer standard cell library and power delivery system.

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Architectures Circuit Design Floorplanning ISSCC 2018 Server Processors 

ISSCC 2018: The IBM z14 Microprocessor And System Control Design

May 13, 2018 David Schor 5 Comments 14 nm, 14HP, A-Bus, floorplan, IBM, ISSCC, ISSCC 2018, mainframe, X-Bus, z/Architecture, z14

A look at the changes and enhancements that were implemented by IBM in their z14 mainframe microprocessor and system control chips.

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Architectures Circuit Design ISSCC 2018 

AMD’s Zen CPU Complex, Cache, and SMU

April 18, 2018 David Schor 0 Comments 14 nm, 14LPP, AMD, cache, floorplan, ISSCC, ISSCC 2017, ISSCC 2018, SRAM, x86, Zen

A look at AMD’s Zen CPU Complex (CCX), a fully independent and modular cluster of up to four cores that are incorporated into a full SoC to form complete products such as their Zeppelin die.

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Architectures Circuit Design Floorplanning ISSCC 2018 

ISSCC 2018: Intel’s Skylake-SP Mesh and Floorplan

March 9, 2018 David Schor 0 Comments 14 nm, floorplan, Intel, ISSCC, ISSCC 2018, Skylake, Skylake-SP, x86, Xeon Scalable

At ISSCC 2018 Intel gave us some more interesting architectural details of their latest Skylake server microprocessors which brought a new mesh interconnect, a new cache hierarchy, and wider vector operations among a large array of other enhancements.

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Top Six Articles

  • TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO
  • IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects
  • TSMC Details 5 nm
  • ISSCC 2018: AMD’s Zeppelin; Multi-chip routing and packaging
  • TSMC Ramps 5nm, Discloses 3nm to Pack Over a Quarter-Billion Transistors Per Square Millimeter
  • VLSI 2018: Samsung’s 2nd Gen 7nm, EUV Goes HVM

Recent

  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
  • The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10
  • Arm’s New Cortex-M55 Breathes Helium

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
  • Intel Launches Lakefield: An Experiment With Multiple New Technologies

    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    June 15, 2020 David Schor 3
  • Arm Unveils the Cortex-A78: When Less Is More

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0
  • Arm Cortex-X1: The First From The Cortex-X Custom Program

    Arm Cortex-X1: The First From The Cortex-X Custom Program

    May 26, 2020 David Schor 0
  • Comment
  • Recent
  • Steffen Eilers says:

    Yes....

  • Steffen says:

    Really exited for the time when ARM tries to serio...

  • Piotr says:

    Depends on what you're comparing. N6 manufacturing...

  • espinozahg says:

    Hey, everybody talks about GPU FLOPS but nobody ab...

  • Filipe says:

    O bom é q a arm tá longe de alcançar esse pata...

  • Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10
    Arm’s New Cortex-M55 Breathes Helium

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    Intel Launches Lakefield: An Experiment With Multiple New Technologies

    June 15, 2020 David Schor 3
    Arm Unveils the Cortex-A78: When Less Is More

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0

    Random Picks

    CEA-Leti Demos a 6-Chiplet 96-Core 3D-Stacked MIPS Processor

    CEA-Leti Demos a 6-Chiplet 96-Core 3D-Stacked MIPS Processor

    March 1, 2020 David Schor 0
    Intel Launches 10th Gen Comet Lake vPro Processors

    Intel Launches 10th Gen Comet Lake vPro Processors

    May 13, 2020 David Schor 0
    DARPA ERI: HIVE and Intel PUMA Graph Processor

    DARPA ERI: HIVE and Intel PUMA Graph Processor

    August 4, 2019 David Schor 0
    Intel Stratix 10 DX Adds PCIe Gen 4.0, Cache Coherency: UPI As Stopgap

    Intel Stratix 10 DX Adds PCIe Gen 4.0, Cache Coherency: UPI As Stopgap

    September 20, 2019 David Schor 0
    8th Gen Coffee Lake and 9th Gen Lineup

    8th Gen Coffee Lake and 9th Gen Lineup

    November 24, 2017 David Schor 0

    Random Tags

    2.5D packaging 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 12nm 14 nm 16nm AI AMD ARM ARMv8 chiplet Coffee Lake Core i5 Core i7 edge computing EMIB EUV FinFET Foveros FPGA GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen Zen 2

    x86 WorldView All

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
    Architectures 

    The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids

    June 29, 2020September 19, 2020 David Schor 10

    Intel publishes details of its upcoming Advanced Matrix Extension (AMX), an x86 extension set to debut with Sapphire Rapids that introduces a new matrix register file and accompanying matrix operations.

    Centaur New x86 Server Processor Packs an AI Punch
    Architectures Neural Processors Server Processors 

    Centaur New x86 Server Processor Packs an AI Punch

    January 24, 2020 David Schor 3
    Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs
    Desktop Processors Mobile Processors Roadmaps Server Processors 

    Zhaoxin Unveiled Next-Generation x86 SoC Plans: 32-Core Servers, Sub-7nm Client Designs

    December 12, 2019 David Schor 0
    Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512
    Architectures Embedded Processors Neural Processors Server Processors 

    Centaur Unveils Its New Server-Class x86 Core: CNS; Adds AVX-512

    December 9, 2019 David Schor 3
    SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio
    Architectures Roadmaps Server Processors Supercomputers Supercomputing 19 

    SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio

    November 17, 2019 David Schor 1
    AMD Announces 3rd Gen Ryzen Threadripper
    Desktop Processors Server Processors 

    AMD Announces 3rd Gen Ryzen Threadripper

    November 8, 2019 David Schor 0

    Random

    UMC Rolls Out 22-Nanometer

    UMC Rolls Out 22-Nanometer

    December 13, 2019 David Schor 0
    Intel Updates Apollo Lake: More LPC Reliability Issues

    Intel Updates Apollo Lake: More LPC Reliability Issues

    September 9, 2019 David Schor 1
    VLSI 2018: Next Week’s Samsung and GlobalFoundries Papers

    VLSI 2018: Next Week’s Samsung and GlobalFoundries Papers

    June 17, 2018 David Schor 0
    TSMC Demonstrates A 7nm Arm-Based Chiplet Design for HPC

    TSMC Demonstrates A 7nm Arm-Based Chiplet Design for HPC

    June 22, 2019 David Schor 0
    Analog AI Startup Mythic To Compute And Scale In Flash

    Analog AI Startup Mythic To Compute And Scale In Flash

    October 6, 2019 David Schor 0
    8th Gen Coffee Lake and 9th Gen Lineup

    8th Gen Coffee Lake and 9th Gen Lineup

    November 24, 2017 David Schor 0
    IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects

    IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects

    February 17, 2018 David Schor 3

    ARM WorldView All

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support
    Roadmaps Server Processors 

    Arm Updates Its Neoverse Roadmap: New BFloat16, SVE Support

    September 22, 2020September 30, 2020 David Schor 3
    Arm’s New Cortex-M55 Breathes Helium
    Architectures Embedded Processors 

    Arm’s New Cortex-M55 Breathes Helium

    June 20, 2020 David Schor 0
    Arm Unveils the Cortex-A78: When Less Is More
    Architectures Mobile Processors 

    Arm Unveils the Cortex-A78: When Less Is More

    May 26, 2020 David Schor 0
    Arm Cortex-X1: The First From The Cortex-X Custom Program
    Architectures Mobile Processors 

    Arm Cortex-X1: The First From The Cortex-X Custom Program

    May 26, 2020 David Schor 0
    Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55
    Architectures Neural Processors 

    Arm Launches the Cortex-M55 and Its MicroNPU Companion, the Ethos-U55

    February 10, 2020 David Schor 0
    Arm Ethos is for Ubiquitous AI At the Edge
    Architectures Linley Processor Conference Neural Processors 

    Arm Ethos is for Ubiquitous AI At the Edge

    February 6, 2020 David Schor 0

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