Intel Launches 10th Gen Comet Lake vPro Processors
Intel launches its 10th-generation Comet Lake-based vPro processors.
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Our latest coverage from the chip architecture world, including announced and planned as well as recently launched products.
The x86 Advanced Matrix Extension (AMX) Brings Matrix Operations; To Debut with Sapphire Rapids
Intel publishes details of its upcoming Advanced Matrix Extension (AMX), an x86 extension set to debut with Sapphire Rapids that introduces a new matrix register file and accompanying matrix operations.
Arm’s New Cortex-M55 Breathes Helium
A look at the new Cortex-M55, an embedded ARMv8 core with the new Helium vector extension.
Arm Unveils the Cortex-A78: When Less Is More
Arm unveils the Cortex-A78 microarchitecture for next-generation flagship smartphones.
Arm Cortex-X1: The First From The Cortex-X Custom Program
Arm launches the Cortex-X1, their most powerful Cortex CPU to date. This is the first CPU from the new Cortex-X Custom Program.
Process TechnologyView All
Our latest coverage from the semiconductor world including recent announcements and analysis of new process nodes from semiconductor foundries including Intel, TSMC, Samsung, GlobalFoundries, and other.
Left, Right, Above, and Under: Intel 3D Packaging Tech Gains Omnidirectionality
A look at ODI, a new family of packaging interconnect technologies that bridges the gap between Intel’s EMIB (2.5D) and Foveros (3D) by providing the flexibility of an EMIB in 3D with additional benefits of thermal & power.
SupercomputersView All
The latest chip-related news from the world of HPC and supercomputers.
ConferencesView All
Intel Launches Entry-Level Comet Lake Xeon Ws
Intel launches a new series of Xeon W processors for entry-level workstations based on Comet Lake.
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AMD Launches Ryzen Pro 4000 Series
AMD launches its Zen 2-based Ryzen Pro 4000 series for enterprise customers.
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Intel Launches 10th Gen Comet Lake Desktop Processors
Intel launches 10th Generation Core desktop processors, formerly codename Comet Lake. The new lineup brings 22 new chips with up to 10 cores and 20 threads with turbo frequencies of up to 5.3 GHz.
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TSMC Ramps 5nm, Discloses 3nm to Pack Over a Quarter-Billion Transistors Per Square Millimeter
TSMC reports a flat Q1 amid the COVID-19 pandemic, ramps its 5nm node with good yield and discloses key 3-nanometer (N3) details. N3 will be a full node jump over N5 and is expected to offer over a quarter-billion transistors per each millimeter square of silicon.
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Ranovus Odin: Co-Packaging Next-Gen DC Switches and Accelerators With Silicon Photonics
Ranovus launches its Odin platform, a multi-wavelength Quantum Dot Laser (QDL) based silicon photonic engine which includes 800Gbps to 3.2Tbps single-chip engines as well as co-packaged optics scaling up to 51.2Tbps for next-generation data center switches and other HPC compute chips that require high bandwidth capacity.
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A Look at Intel Lakefield: A 3D-Stacked Single-ISA Heterogeneous Penta-Core SoC
A look at Lakefield, Intel’s new mobile-class heterogeneous penta-core SoC built using two dies 3D-stacked face-to-face using the company Foveros packaging technology.
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TSMC Details 5 nm
TSMC details its 5-nanometer node for mobile and HPC applications. The process features the industry’s highest density transistors with a high-mobility channel and highest-density SRAM cells.
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IBM Doubles Its 14nm eDRAM Density, Adds Hundreds of Megabytes of Cache
IBM doubles its 14-nanometer eDRAM density through physical design work, enabling the packing of hundreds of additional megabytes of cache on the latest z15 microprocessor and system controller.
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TSMC Announces 2x Reticle CoWoS For Next-Gen 5nm HPC Applications
TSMC announces an enhancement to its CoWoS packaging technology with support for up to 2x the reticle size. The new technology is ready for next-generation 5-nanometer HPC applications.
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