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Sunday, June 26, 2022
Latest:
  • A Look At Samsung’s 4LPE Process
  • A Look At Intel 4 Process Technology
  • Samsung 17nm follows Intel 16
  • Reincarnating The 6502 Using Flexible TFT Tech For IoT
  • Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC
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Tegra

Architectures Floorplanning Hot Chips 30 

Hot Chips 30: Nvidia Xavier SoC

September 8, 2018May 25, 2021 David Schor 12FFN, 12nm, AI, ARM, ARMv8, inference, neural processors, Nvidia, NVLink, Tegra, Xavier

An overview of the Xavier SoC which was detailed by Nvidia at Hot Chips 30.

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Top Six Articles

  • A Look At Intel 4 Process Technology
  • A Look At Samsung’s 4LPE Process
  • TSMC Details 5 nm
  • IEDM 2017 + ISSCC 2018: Intel’s 10nm, switching to cobalt interconnects
  • TSMC Extends Its 5nm Family With A New Enhanced-Performance N4P Node
  • TSMC 7nm HD and HP Cells, 2nd Gen 7nm, And The Snapdragon 855 DTCO

Recent

  • A Look At Samsung’s 4LPE Process

    A Look At Samsung’s 4LPE Process

    June 26, 2022June 26, 2022 David Schor
  • A Look At Intel 4 Process Technology

    A Look At Intel 4 Process Technology

    June 19, 2022June 20, 2022 David Schor
  • Samsung 17nm follows Intel 16

    Samsung 17nm follows Intel 16

    May 22, 2022May 22, 2022 David Schor
  • Reincarnating The 6502 Using Flexible TFT Tech For IoT

    Reincarnating The 6502 Using Flexible TFT Tech For IoT

    May 8, 2022May 8, 2022 David Schor
  • Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC

    Intel Unveils BonanzaMine, A Bitcoin Accelerator ASIC

    February 20, 2022February 21, 2022 David Schor
  • Samsung-Esperanto Concept AI-SSD Prototype

    Samsung-Esperanto Concept AI-SSD Prototype

    November 21, 2021November 21, 2021 David Schor

Random Picks

ISSCC 2018: The IBM z14 Microprocessor And System Control Design

ISSCC 2018: The IBM z14 Microprocessor And System Control Design

May 13, 2018May 25, 2021 David Schor
Samsung Details 5nm and 4nm; Adds 8LPA, 5LPP, and 4LPP Nodes; Readies 3nm GAA For Next Year

Samsung Details 5nm and 4nm; Adds 8LPA, 5LPP, and 4LPP Nodes; Readies 3nm GAA For Next Year

May 21, 2021June 24, 2021 David Schor
Arm Launches The DSU-110 For New Armv9 CPU Clusters

Arm Launches The DSU-110 For New Armv9 CPU Clusters

May 25, 2021May 25, 2021 David Schor
ORNL’s 200-petaFLOPS Summit Supercomputer Has Arrived, To Become World’s Fastest

ORNL’s 200-petaFLOPS Summit Supercomputer Has Arrived, To Become World’s Fastest

June 16, 2018May 25, 2021 David Schor
VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP

VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP

July 22, 2018May 25, 2021 David Schor

Random Tags

2.5D packaging 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 AVX-512 chiplet Coffee Lake Core i5 Core i7 Core i9 edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Intel Introduces 2nd Gen Neuromorphic Research Chip: Loihi 2 on Intel 4 EUV Process

Intel Introduces 2nd Gen Neuromorphic Research Chip: Loihi 2 on Intel 4 EUV Process

September 30, 2021September 30, 2021 David Schor
Intel Refreshes 2nd Gen Xeon Scalable, Slashes Prices

Intel Refreshes 2nd Gen Xeon Scalable, Slashes Prices

February 27, 2020May 25, 2021 David Schor
Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700

Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700

May 25, 2021May 25, 2021 David Schor
Left, Right, Above, and Under: Intel 3D Packaging Tech Gains Omnidirectionality

Left, Right, Above, and Under: Intel 3D Packaging Tech Gains Omnidirectionality

May 17, 2020May 23, 2021 David Schor
AMD launches EPYC Embedded 3000 and Ryzen Embedded V1000 SoCs

AMD launches EPYC Embedded 3000 and Ryzen Embedded V1000 SoCs

February 23, 2018May 25, 2021 David Schor
Intel Announces a 5 GHz Core i7-8086K, Launches on the 40th Anniversary of the 8086

Intel Announces a 5 GHz Core i7-8086K, Launches on the 40th Anniversary of the 8086

June 5, 2018May 25, 2021 David Schor
Cavium Takes ARM to Petascale with Astra

Cavium Takes ARM to Petascale with Astra

August 25, 2018May 25, 2021 David Schor

ARM WorldView All

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor
A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip
IEDM 2020 Interconnects Packaging Subscriber Only Content 

A Look At Trishul: Arm’s First High-Density 3D Logic Stacked Test-Chip

June 11, 2021June 11, 2021 David Schor
Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700
Architectures Interconnects Network-on-Chip 

Arm Launches New Coherent And SoC Interconnects: CI-700 & NI-700

May 25, 2021May 25, 2021 David Schor
Arm Launches The DSU-110 For New Armv9 CPU Clusters
Architectures Interconnects Mobile Processors 

Arm Launches The DSU-110 For New Armv9 CPU Clusters

May 25, 2021May 25, 2021 David Schor

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