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Thursday, September 29, 2022
Latest:
  • SiFive Introduces A New Coprocessor Interface, Targets Custom Accelerators
  • N3E Replaces N3; Comes In Many Flavors
  • Samsung Foundry On EUV, Pellicles, Capacity, and Yield
  • Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements
  • Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
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PowerAXON

Architectures OpenPOWER Summit Roadmaps Server Processors 

IBM Open Sources Power ISA, Delays POWER10 to 2021

September 12, 2019May 25, 2021 David Schor IBM, OpenPOWER, OpenPOWER Summit, OpenPOWER Summit 2019, POWER, Power ISA, POWER10, POWER9, PowerAXON

At the recent OpenPOWER Summit, IBM outlined their new roadmap, open-sourced the Power ISA, and made a number of additional announcements.

Read more
Architectures Floorplanning Hot Chips 30 Interconnects Server Processors 

POWER9 Scales Up To 1.2 TB/s of I/O, Targets NVLink 3, OpenCAPI Memory for 2019

October 7, 2018May 25, 2021 David Schor 14 nm, 14HP, A-Bus, Centaur, Hot Chips, Hot Chips 30, IBM, NVLink, OpenCAPI, POWER, Power ISA, POWER9, PowerAXON, X-Bus

A look at the IBM POWER9 scale-up design recently disclosed at Hot Chips 30 and their plans for a 3rd POWER9 derivative for 2019.

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Top Six Articles

  • N3E Replaces N3; Comes In Many Flavors
  • SiFive Introduces A New Coprocessor Interface, Targets Custom Accelerators
  • Arm Unveils the Cortex-A78: When Less Is More
  • A Look At Intel 4 Process Technology
  • Arm Introduces The Cortex-A715
  • AMD 3D Stacks SRAM Bumplessly

Recent

  • SiFive Introduces A New Coprocessor Interface, Targets Custom Accelerators

    SiFive Introduces A New Coprocessor Interface, Targets Custom Accelerators

    September 20, 2022September 20, 2022 David Schor
  • N3E Replaces N3; Comes In Many Flavors

    N3E Replaces N3; Comes In Many Flavors

    September 4, 2022September 4, 2022 David Schor
  • Samsung Foundry On EUV, Pellicles, Capacity, and Yield

    Samsung Foundry On EUV, Pellicles, Capacity, and Yield

    July 25, 2022July 25, 2022 David Schor
  • Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements

    Samsung 3nm GAAFET Enters Risk Production; Discusses Next-Gen Improvements

    July 5, 2022July 5, 2022 David Schor
  • Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

    Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

    June 28, 2022June 28, 2022 David Schor
  • Arm Unveils Next-Gen Flagship Core: Cortex-X3

    Arm Unveils Next-Gen Flagship Core: Cortex-X3

    June 28, 2022June 28, 2022 David Schor

Random Picks

Intel Introduces 2nd Gen Neuromorphic Research Chip: Loihi 2 on Intel 4 EUV Process

Intel Introduces 2nd Gen Neuromorphic Research Chip: Loihi 2 on Intel 4 EUV Process

September 30, 2021September 30, 2021 David Schor
Arm Introduces The Cortex-A715

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Intel to leverage EMIBs to create mobile processors with discrete AMD graphics

Intel to leverage EMIBs to create mobile processors with discrete AMD graphics

November 7, 2017May 25, 2021 David Schor
Radeon RX 5700: Navi and the RDNA Architecture

Radeon RX 5700: Navi and the RDNA Architecture

February 23, 2020May 25, 2021 David Schor

Random Tags

2.5D packaging 3 nm 3D packaging 5 nm 5nm 7 nm 7nm 10 nm 10nm 14 nm 16nm AI AMD ARM ARMv8 ARMv9 chiplet Coffee Lake Core i5 Core i7 Cortex edge computing EMIB EUV FinFET GlobalFoundries Hot Chips IBM Ice Lake IEDM inference Intel ISSCC multi-chip package neural processors process technology RISC-V Samsung subscriber only (general) Sunny Cove Supercomputers TSMC VLSI Symposium x86 Zen

x86 WorldView All

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling
Desktop Processors Mobile Processors 

Intel Introduces Thread Director For Heterogeneous Multi-Core Workload Scheduling

August 19, 2021August 19, 2021 David Schor

Intel introduces the Intel Thread Director for heterogeneous multi-core workload scheduling

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs
Architectures Server Processors 

Intel Unveils Sapphire Rapids: Next-Generation Server CPUs

August 19, 2021August 19, 2021 David Schor
Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance
Architectures Data Processing Unit Desktop Processors Mobile Processors 

Intel’s Gracemont Small Core Eclipses Last-Gen Big Core Performance

August 19, 2021August 21, 2021 David Schor
Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC
Architectures Desktop Processors Mobile Processors 

Intel Unveils Alder Lake: Next-Generation Mainstream Heterogeneous Multi-Core SoC

August 19, 2021August 19, 2021 David Schor
Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs
Architectures Desktop Processors Mobile Processors Server Processors 

Intel Details Golden Cove: Next-Generation Big Core For Client and Server SoCs

August 19, 2021August 19, 2021 David Schor
Intel Launches 3rd Gen Ice Lake Xeon Scalable
Architectures Server Processors 

Intel Launches 3rd Gen Ice Lake Xeon Scalable

April 6, 2021May 23, 2021 David Schor

Random

Radeon RX 5700: Navi and the RDNA Architecture

Radeon RX 5700: Navi and the RDNA Architecture

February 23, 2020May 25, 2021 David Schor
Intel 2021 Process Technology Update: Intel 7, Intel 4, Intel 3, and Intel 20A

Intel 2021 Process Technology Update: Intel 7, Intel 4, Intel 3, and Intel 20A

July 26, 2021July 26, 2021 David Schor
Intel Announces Keem Bay: 3rd Generation Movidius VPU

Intel Announces Keem Bay: 3rd Generation Movidius VPU

November 12, 2019May 25, 2021 David Schor
IBM Doubles Its 14nm eDRAM Density, Adds Hundreds of Megabytes of Cache

IBM Doubles Its 14nm eDRAM Density, Adds Hundreds of Megabytes of Cache

March 8, 2020May 25, 2021 David Schor
TSMC To Build A 5-Nanometer Fab In Arizona; Invest $12B Over The Next 8 Years

TSMC To Build A 5-Nanometer Fab In Arizona; Invest $12B Over The Next 8 Years

May 14, 2020May 23, 2021 David Schor
Ayar Labs Realizes Co-Packaged Silicon Photonics

Ayar Labs Realizes Co-Packaged Silicon Photonics

January 19, 2020May 25, 2021 David Schor
TSMC Digs Trenches In Search Of Higher Performance

TSMC Digs Trenches In Search Of Higher Performance

December 14, 2019May 25, 2021 David Schor

ARM WorldView All

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency
Architectures Mobile Processors 

Arm Refreshes The Cortex-A510, Squeezes Higher Efficiency

June 28, 2022June 28, 2022 David Schor
Arm Unveils Next-Gen Flagship Core: Cortex-X3
Mobile Processors 

Arm Unveils Next-Gen Flagship Core: Cortex-X3

June 28, 2022June 28, 2022 David Schor
Arm Introduces The Cortex-A715
Architectures Mobile Processors 

Arm Introduces The Cortex-A715

June 28, 2022June 29, 2022 David Schor
Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip
Architectures Server Processors 

Alibaba Open Source XuanTie RISC-V Cores, Introduces In-House Armv9 Server Chip

October 20, 2021October 20, 2021 David Schor
Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration
Data Processing Unit 

Marvell Launches 5nm Octeon 10 DPUs with Neoverse N2 cores, AI Acceleration

June 28, 2021June 28, 2021 David Schor
Arm Introduces Its Confidential Compute Architecture
Architectures 

Arm Introduces Its Confidential Compute Architecture

June 23, 2021June 23, 2021 David Schor

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