POWER

IBM Releases Power ISA v3.1; To Present POWER10 At Hot Chips 32

May 23, 2020May 23, 2021 David Schor bfloat16, Hot Chips, Hot Chips 32, IBM, OpenPOWER, POWER, Power ISA, POWER10

IBM releases Power ISA v3.1. Among the new instructions, there is new bfloat16 support, new reduced-precision outer-product operations including 4-bit integers, and new instruction prefixes. IBM plans on presenting POWER10 at Hot Chips 32.

Architectures OpenPOWER Summit Roadmaps Server Processors

IBM Open Sources Power ISA, Delays POWER10 to 2021

September 12, 2019May 25, 2021 David Schor IBM, OpenPOWER, OpenPOWER Summit, OpenPOWER Summit 2019, POWER, Power ISA, POWER10, POWER9, PowerAXON

At the recent OpenPOWER Summit, IBM outlined their new roadmap, open-sourced the Power ISA, and made a number of additional announcements.

Foundries Process Technologies Roadmaps Server Processors

IBM Chooses Samsung 7nm EUV for Next-Gen POWER and Z Microprocessors

December 20, 2018May 25, 2021 David Schor 7LPP, 7nm, Common Platform Alliance, EUV, IBM, POWER, Power ISA, POWER10, Samsung, Z

IBM partners up with Samsung 7nm EUV process for their next-generation of POWER and Z microprocessors.

Architectures Floorplanning Hot Chips 30 Interconnects Server Processors

POWER9 Scales Up To 1.2 TB/s of I/O, Targets NVLink 3, OpenCAPI Memory for 2019

October 7, 2018May 25, 2021 David Schor 14 nm, 14HP, A-Bus, Centaur, Hot Chips, Hot Chips 30, IBM, NVLink, OpenCAPI, POWER, Power ISA, POWER9, PowerAXON, X-Bus

A look at the IBM POWER9 scale-up design recently disclosed at Hot Chips 30 and their plans for a 3rd POWER9 derivative for 2019.

Supercomputers

ORNL’s 200-petaFLOPS Summit Supercomputer Has Arrived, To Become World’s Fastest

June 16, 2018May 25, 2021 David Schor DoE, IBM, Nvidia, NVLink, ORNL, PCIe 4.0, POWER, Power ISA, Supercomputer

A look at the 200-petaFLOPS Summit supercomputer which was officially unveiled last Friday by Oak Ridge National Laboratory (ORNL).