NEC has been shipping its latest vector processor for a little over two years. The SX-Aurora TSUBASA platform is an accelerator-card based platform. We have covered the SX-Aurora in detail in a number of articles including this fuse article and in our main WikiChip article. NEC ships the Vector Engine (VE) in a number of products including a tower, rack-mount servers, and a supercomputer rack comprising up to 64 accelerators.
New Cascade Lake, Xeon Platinum, AMD Rome Products
When the original SX-Aurora TSUBASA platform launched, the only available server platform that was broadly available was based on Skylake-SP which is what NEC went with. Since then, a number of new products emerged. Intel has since refreshed the platform with Cascade Lake SP and AMD moved on to its second-generation EPYC processors, codenamed Rome. Not surprising, at Supercomputing 2019, NEC made a number of new announcements that incorporate the new Intel and AMD products.
The first part of the product refreshment is the upgrade to Cascade Lake. Previously, NEC paired the VE with either a Xeon Silver or a 16c Xeon Gold such as the 6142. The new platform will use the 8c Xeon Silver 4208 or the 12c Gold 6226 or 20c 6248. Interestingly, NEC is also expanding its offering with Xeon Platinum 9200 (Cascade Lake AP) processors. Those processors only come in Intel’s own S9200WK compute modules designed for water cooling. A 2U chassis packs four of those modules, giving you up to 8 chips and up to 448 cores. We asked NEC about the interest level in the platinum 92000. NEC said that there are, in fact, some customers that are interested.
Since launching Rome early this year, we’ve seen AMD scoring a significant number of design-wins. It is no surprise that, in addition to supporting the new Intel products, NEC also added a number of new AMD-based products. It’s worth noting that although NEC is offering a number of AMD-based products, the vast majority of the SX-Aurora TSUBASA portfolio will remain Intel-based for now.
On display at Supercomputing 2019, NEC showed off the new A412-8 system. This is a very dense, 2U, Rome-based server comprising a single AMD EPYC processor along with eight Vector Engines. One SX-Aurora-AMD design win has already been announced for Deutscher Wetterdienst, the German Meteorological Service.
This system is water-cooled and uses the water cooling PCIe models. NEC says that the chassis supports up to 280 W for the AMD socket (presumably supporting the EYPC 7H12) and eight 250 W accelerator cards.
Vector Engine Type 10E
Along with the CPU refresh, NEC is replacing the previous SX-Aurora Vector Engine ‘Type 10’ with ‘Type 10E’. The ‘E’ is for enhanced memory bandwidth. The actual core frequency remains more or less the same, however, the HBM stack data rate was increased fairly substantially for some products. For the two higher-end models, the Type 10AE/10BE, NEC increased the data rate from 800 MT/s to 880 MT/s, yielding a 10% improvement in bandwidth. For the low-end SKU, Type 10CE, NEC increased the memory bandwidth from 750 GB/s to 1 TB/s.
|Type 10 vs Type 10E|
The Vector Engine Type 10E lineup will go into production in January 2020. NEC’s entire lineup will be refreshed to utilize the new models. Models A100-1, A300-2/4/8, and A500-64 are replaced by models A101-1/A111-1, A311-2/4/8, and A511-64 along with Cascade Lake processors.
With VE Type 10E ramping up in January, NEC outlined its future roadmap. Second-generation Vector Engine (Type 20) is expected to be announced sometime in mid to late 2020. NEC says that 3rd-generation VE is planned for the 2022 timeframe. Type 20 appears to feature modest changes such as higher memory bandwidth and higher core count and frequency, but bigger architectural changes will only come with Type 30. Interestingly, NEC specifically says that Type 30 will feature a new architecture. This implies the Type 20 might look very similarly to Type 10. We are hearing NEC is aiming for 10 cores and possibly eight HBM stacks, but the core architecture remains the same.
- NEC Refreshes SX-Aurora Vector Engine, Outlines Roadmap
- Japanese AI Startup Preferred Networks Designed A Custom Half-petaFLOPS Training Chip
- Samsung M5 Core Details Show Up
- SC19: Aurora Supercomputer To Feature Intel First Exascale Xe GPGPU, 7nm Ponte Vecchio
- A Look at Cerebras Wafer-Scale Engine: Half Square Foot Silicon Chip
- Groq Tensor Streaming Processor Delivers 1 PetaOPS of Compute
- Arm Makes Headway In HPC, Cloud
- Intel Announces Keem Bay: 3rd Generation Movidius VPU
- A Look at Spring Crest: Intel Next-Generation DC Training Neural Processor
- Marvell Lays Out ARM Server Roadmap